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rocket-tools/riscv-gnu-toolchain/spike.git
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riscv
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processor.cc
Age
Commit message (
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Author
Files
Lines
2016-06-08
Add degenerate HW breakpoint implementation
Andrew Waterman
1
-0
/
+4
2016-05-23
Turn off debugging.
Tim Newsome
1
-1
/
+0
2016-05-23
Tell gdb we can handle large packets.
Tim Newsome
1
-1
/
+1
2016-05-23
Exceptions in Debug Mode don't update any regs.
Tim Newsome
1
-7
/
+7
2016-05-23
Remove already-implemented TODO.
Tim Newsome
1
-1
/
+0
2016-05-23
Implement ebreak[mhsu].
Tim Newsome
1
-2
/
+5
2016-05-23
Remove dependency on include file in my homedir.
Tim Newsome
1
-31
/
+32
2016-05-23
Make -H halt the core right out of reset.
Tim Newsome
1
-2
/
+5
2016-05-23
Halt when gdb user hits ^C.
Tim Newsome
1
-1
/
+0
2016-05-23
Single step appears to work.
Tim Newsome
1
-0
/
+1
2016-05-23
Fix off-by-two in general read registers.
Tim Newsome
1
-1
/
+0
2016-05-23
Remove unused code.
Tim Newsome
1
-1
/
+2
2016-05-23
Add dret.
Tim Newsome
1
-1
/
+1
2016-05-23
Implement single memory read access.
Tim Newsome
1
-1
/
+5
2016-05-23
Exceptions in Debug Mode, stay in Debug Mode.
Tim Newsome
1
-1
/
+5
2016-05-23
Continue works well enough for DebugTest.test_exit
Tim Newsome
1
-1
/
+0
2016-05-23
Refactor how we track in-progress operations.
Tim Newsome
1
-1
/
+5
2016-05-23
processor_t unfriends gdbserver_t.
Tim Newsome
1
-2
/
+2
2016-05-23
Add debug_module bus device.
Tim Newsome
1
-6
/
+2
2016-05-23
Can jump to and execute Debug ROM.
Tim Newsome
1
-1
/
+6
2016-05-23
When gdb connects, jump to Debug ROM and segfault.
Tim Newsome
1
-0
/
+5
2016-05-23
Gutting direct-access gdb.
Tim Newsome
1
-13
/
+9
2016-05-23
Add writing to DCSR, DPC, DSCRATCH.
Tim Newsome
1
-0
/
+37
2016-05-23
Only halt on ebreak if a debugger is attached.
Tim Newsome
1
-2
/
+2
2016-05-23
Flush icache when using swbps and report to gdb.
Tim Newsome
1
-2
/
+3
2016-05-23
Software breakpoints seem to work.
Tim Newsome
1
-0
/
+6
2016-05-23
Looks like single step works.
Tim Newsome
1
-1
/
+6
2016-05-23
Now you can halt/continue from gdb.
Tim Newsome
1
-1
/
+6
2016-05-22
Allow delegation of device interrupts
Andrew Waterman
1
-1
/
+1
2016-05-02
Add back IPI support
Andrew Waterman
1
-14
/
+11
2016-05-02
Remove MIPI; mip.MSIP bit is read-only
Andrew Waterman
1
-6
/
+2
2016-05-02
Remove tohost/fromhost registers
Andrew Waterman
1
-14
/
+0
2016-04-30
Initialize mtvec to DEFAULT_MTVEC
Andrew Waterman
1
-0
/
+1
2016-04-30
Remove SCRs; add padding after config string
Andrew Waterman
1
-1
/
+0
2016-04-29
Move much closer to new platform-M memory map
Andrew Waterman
1
-4
/
+5
2016-04-28
Remove MTIME[CMP]; add RTC device
Andrew Waterman
1
-16
/
+1
2016-04-06
Remove non-standard uarch CSRs
Andrew Waterman
1
-17
/
+0
2016-03-16
Update definition of base field in misa register
Andrew Waterman
1
-6
/
+1
2016-03-03
Fix up interrupt delegation
Andrew Waterman
1
-25
/
+21
2016-03-02
Add counter-enable registers
Andrew Waterman
1
-0
/
+32
2016-03-02
WIP on priv spec v1.9
Andrew Waterman
1
-60
/
+6
2016-03-02
New definitions of misa/marchid/mvendorid
Andrew Waterman
1
-8
/
+19
2016-03-02
implement PUM functionality
Andrew Waterman
1
-5
/
+7
2016-03-02
sptbr now a holds a PPN, not an address
Andrew Waterman
1
-1
/
+1
2016-03-02
Use simpler MTVEC scheme
Andrew Waterman
1
-2
/
+2
2016-03-02
Zero-extend all CSR writes
Andrew Waterman
1
-3
/
+4
2016-03-02
Fix ERET serialization strategy
Andrew Waterman
1
-0
/
+2
2016-03-02
WIP on priv spec v1.9
Andrew Waterman
1
-89
/
+101
2016-01-12
don't ignore data value when writing MIPI
Andrew Waterman
1
-1
/
+1
2015-11-12
Generate device tree for target machine
Andrew Waterman
1
-23
/
+49
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