| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2019-10-23 | rvv: add reg checking rule for general fomrat | Chih-Min Chao | 1 | -0/+1 |
| 2019-09-04 | rvv: remove legacy check 1905 | Chih-Min Chao | 1 | -1/+0 |
| 2019-06-08 | rvv: reformat the code by 'astyle insns/v*.h -s2 -A2' | Dave | 1 | -24/+24 |
| 2019-06-03 | rvv: refactor to the VU | Dave.Wen | 1 | -1/+1 |
| 2019-05-19 | rvv: append 1950 check to unspported instruction | Chih-Min Chao | 1 | -0/+1 |
| 2019-04-30 | rvv: decouple the vectorUnit to the processor's state. | Dave.Wen | 1 | -1/+1 |
| 2019-04-29 | rvv: add mask skiping to VI_LOOP_BASE | Chih-Min Chao | 1 | -2/+0 |
| 2019-04-11 | rvv: fix vssub[u]_v[vx].h | Chih-Min Chao | 1 | -8/+30 |
| 2019-03-31 | rvv: add vsadd[u]_v[vxi] and vssub[u]_v[vx] | Dave.Wen | 1 | -2/+5 |
| 2019-03-26 | update all instruction templates and part of the implementations | Dave.Wen | 1 | -0/+5 |
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index : rocket-tools/riscv-gnu-toolchain/spike.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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