| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2019-10-28 | rvv: fix vnclip corner case | Chih-Min Chao | 1 | -1/+1 |
| 2019-10-08 | rvv: fix vssr/vssra rounding issue | Chih-Min Chao | 1 | -2/+3 |
| 2019-09-04 | rvv: remove legacy check 1905 | Chih-Min Chao | 1 | -1/+0 |
| 2019-06-03 | rvv: fix ssra/ssrl | Chih-Min Chao | 1 | -7/+3 |
| 2019-06-03 | rvv: refactor to the VU | Dave.Wen | 1 | -1/+1 |
| 2019-05-30 | rvv: fix vsrl? | Chih-Min Chao | 1 | -1/+6 |
| 2019-05-28 | rvv: add correct mask for all shift instruction | Chih-Min Chao | 1 | -1/+1 |
| 2019-05-28 | rvv: fix vssra.vv/vx | Chih-Min Chao | 1 | -2/+2 |
| 2019-05-23 | rvv: fix vssra | Dave.Wen | 1 | -1/+1 |
| 2019-05-19 | rvv: append 1950 check to unspported instruction | Chih-Min Chao | 1 | -0/+1 |
| 2019-05-16 | fixed vssra_v[vxi] and vssrl_v[vxi] | Dave.Wen | 1 | -2/+3 |
| 2019-05-03 | rvv: add vssra.v[vxi] vssrl.v[vxi] | Chih-Min Chao | 1 | -2/+4 |
| 2019-04-15 | trap: use reserved trap to issue unimplemented instruction | Chih-Min Chao | 1 | -1/+1 |
| 2019-03-26 | update all instruction templates and part of the implementations | Dave.Wen | 1 | -1/+1 |
| 2019-03-26 | declare vector instructions without VFUNARY0/1 and VMUNARY0 | Dave.Wen | 1 | -0/+5 |
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index : rocket-tools/riscv-gnu-toolchain/spike.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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