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path: root/riscv/insns/vsmul_vv.h
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2020-03-27rvv: fix int_max/min value calculationChih-Min Chao1-4/+4
2019-10-08rvv: fix vsmul sign and variable typeChih-Min Chao1-12/+11
2019-09-04rvv: remove legacy check 1905Chih-Min Chao1-1/+0
2019-07-22Avoid relying on sizeof longAndrew Waterman1-2/+2
2019-06-08rvv: reformat the code by 'astyle insns/v*.h -s2 -A2'Dave1-2/+2
2019-06-03rvv: refactor to the VUDave.Wen1-5/+5
2019-05-31rvv: fix vsmul for sew64Chih-Min Chao1-24/+24
2019-05-22rvv: fix smul rounding issueDave.Wen1-26/+21
2019-05-21rvv: fix the smul rounding bitDave.Wen1-1/+1
2019-05-21rvv: fix smul_v[vx]Dave.Wen1-4/+4
2019-05-19rvv: append 1950 check to unspported instructionChih-Min Chao1-0/+1
2019-05-17rvv: remove the debug informationDave.Wen1-4/+0
2019-05-16fix the smulDave.Wen1-11/+14
2019-04-30rvv: decouple the vectorUnit to the processor's state.Dave.Wen1-6/+6
2019-04-25rvv: fix vsmulv[vx]Dave.Wen1-26/+34
2019-04-22fixed type RUN to RNUDave.Wen1-1/+1
2019-03-29rvv: add vsmul_v[vx]Dave.Wen1-2/+28
2019-03-26update all instruction templates and part of the implementationsDave.Wen1-1/+1
2019-03-26declare vector instructions without VFUNARY0/1 and VMUNARY0Dave.Wen1-0/+5