| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2020-03-04 | rvv: remove the option of vector misaligned access | Zhen Wei | 1 | -2/+2 |
| 2019-11-28 | rvv: fix vl1r checking rule | Chih-Min Chao | 1 | -0/+1 |
| 2019-11-27 | rvv: add whole register load/store, vl1r.v/vs1r.v | Chih-Min Chao | 1 | -0/+8 |
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index : rocket-tools/riscv-gnu-toolchain/spike.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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