aboutsummaryrefslogtreecommitdiff
path: root/riscv/insns/vrem_vv.h
AgeCommit message (Collapse)AuthorFilesLines
2022-08-10Add space between if/while/switch and '('Weiwei Li1-1/+1
Add space between ')' and '{'
2020-09-15rvv: fix int type is not enough to do shift (#544)Han-Kuan Chen1-1/+1
int can only represent 32 bit in lp64 model when sew is greater than 32, the behavior is undefined
2019-06-18rvv: add integer/fixed-point/mask/reduction/permutation instructionsChih-Min Chao1-0/+11
based on v-spec 0.7.1, support sections: 12/13/15.1 ~ 15.2/16/17 element size: 8/16/32/64 support ediv: 1 Signed-off-by: Bruce Hoult <bruce@hoult.org> Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> Signed-off-by: Dave Wen <dave.wen@sifive.com>