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No need to eliminate the upper 32 bits of the 64-bit x-register, as all
RV32 instructions should sign-extend their results to 64 bits.
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This reverts commit bf5406d4df625678bc6ec20ce1d48541541dba54.
We found a clever way to efficiently implement slti/sltiu despite the
reversed operands. The trick is because of the following fact:
(a < b) === !(b <= a) === !(b-1 < a)
So just turn off the carry-in when doing the subtraction for the comparison.
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Rationale was that since we have the datapath for rc = (ra < rb),
it's straightforward to also add rc = !(imm < rb) = (rb <= imm).
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Massive changes to gcc, binutils to support new instruction encoding.
Simulator reflects these changes.
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Moved cross-compiler to /xcc/ rather than /
Added ISA sim in /sim/
Added Proxy Kernel in /pk/ (to be cleaned up)
Added opcode map to /opcodes/ (ditto)
Added documentation to /doc/
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