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authorAndrew Waterman <waterman@s141.Millennium.Berkeley.EDU>2010-07-28 19:08:04 -0700
committerAndrew Waterman <waterman@s141.Millennium.Berkeley.EDU>2010-07-28 19:08:04 -0700
commite8125348b3d13a2e96ae389efc2a16a1e8e34ea3 (patch)
tree4791da3758d733d64ff7bee97a340e8210a525a6 /riscv/insns/slti.h
parent133806b398a42da859a187eebf5792eeaed9e9d1 (diff)
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[sim,xcc] Changed instruction format to RISC-V
Massive changes to gcc, binutils to support new instruction encoding. Simulator reflects these changes.
Diffstat (limited to 'riscv/insns/slti.h')
-rw-r--r--riscv/insns/slti.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/slti.h b/riscv/insns/slti.h
index 6de88a5..a5ef31e 100644
--- a/riscv/insns/slti.h
+++ b/riscv/insns/slti.h
@@ -1 +1 @@
-RT = sreg_t(cmp_trunc(RS)) < sreg_t(cmp_trunc(SIMM));
+RA = sreg_t(cmp_trunc(RB)) < sreg_t(cmp_trunc(SIMM));