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rocket-tools/riscv-gnu-toolchain/spike.git
confprec
cs250
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debug_rom
debug_rom_fence
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dts_parsing
dynamic
eos18-bringup
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hwachav4
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master
mmio-hack
mvp
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no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
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rva-profile-support
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sifive/rvv0.9-phase2
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debug_rom
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debug_rom.S
Age
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Author
Files
Lines
2019-07-22
Writing non-existent CSRs, access FPRs with mstatus.FS=0 (#311)
Tim Newsome
1
-0
/
+4
2019-05-14
Implement debug hasel support (#287)
Tim Newsome
1
-2
/
+5
2018-03-06
Fix install of a missed header from debug_rom.
Prashanth Mundkur
1
-2
/
+2
2017-06-08
`make clean && make` works again in debug_rom
Tim Newsome
1
-1
/
+1
2017-04-18
debug: Add fence and fence.i to ensure Debug RAM is ready.
Megan Wachs
1
-22
/
+9
2017-04-17
debug: Use more unique debug ROM names
Megan Wachs
1
-15
/
+19
2017-04-17
debug: Use a more practical debug ROM
Megan Wachs
1
-139
/
+68
2016-06-22
Parameterize debug ROM contents on XLEN
Andrew Waterman
1
-5
/
+48
2016-06-22
Remove fence.i from debug ROM
Andrew Waterman
1
-1
/
+0
2016-06-09
Fix 2 bugs in Debug ROM: (#52)
Tim Newsome
1
-5
/
+7
2016-06-03
DCSR cause was moved, bug debug ROM wasn't updated
Tim Newsome
1
-2
/
+2
2016-06-01
Move sethaltnot and cleardebint.
Tim Newsome
1
-2
/
+2
2016-05-24
New encoding.h for new CSR addresses.
Tim Newsome
1
-1
/
+1
2016-05-24
Move cleardebint, per spec.
Tim Newsome
1
-1
/
+1
2016-05-23
Change DCSR bits to match spec.
Tim Newsome
1
-19
/
+11
2016-05-23
Use fence.i in Debug ROM.
Tim Newsome
1
-0
/
+1
2016-05-23
Add dret.
Tim Newsome
1
-2
/
+1
2016-05-23
Implement single memory read access.
Tim Newsome
1
-8
/
+12
2016-05-23
Exceptions in Debug Mode, stay in Debug Mode.
Tim Newsome
1
-1
/
+12
2016-05-23
Have Debug memory kind of working again.
Tim Newsome
1
-6
/
+5
2016-05-23
Fix race using fence.
Tim Newsome
1
-5
/
+1
2016-05-23
Refactor how we track in-progress operations.
Tim Newsome
1
-0
/
+1
2016-05-23
processor_t unfriends gdbserver_t.
Tim Newsome
1
-1
/
+1
2016-05-23
Add debug_module bus device.
Tim Newsome
1
-10
/
+9
2016-05-23
ROM -> RAM -> ROM, waiting for debug int.
Tim Newsome
1
-1
/
+1
2016-05-23
Jump to the correct (temporary) Debug RAM address.
Tim Newsome
1
-1
/
+2
2016-05-23
Clean up how Debug ROM is included.
Tim Newsome
1
-0
/
+105
2016-05-23
Can jump to and execute Debug ROM.
Tim Newsome
1
-105
/
+0
2016-05-23
Add debug rom code.
Tim Newsome
1
-0
/
+105