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rocket-tools/riscv-gnu-toolchain/spike.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
sparse-mem
speed2
speedup-hacks
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sifive/rvv0.9-phase2
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2022-06-03
Simplify misaligned_load()
trigger_priority
Tim Newsome
2
-15
/
+4
2022-06-03
Simplify handling of misaligned loads/stores
Andrew Waterman
1
-48
/
+34
2022-06-03
Make check_trigger_address_before() return void.
Tim Newsome
2
-18
/
+12
2022-06-03
Fix trigger store priority.
Tim Newsome
2
-16
/
+39
2022-06-03
Make templated store_fast() for use with store_func()
Tim Newsome
1
-29
/
+39
2022-06-03
Check for alignment in load_slow_path().
Tim Newsome
2
-8
/
+29
2022-05-26
Turn load_fast() from macro into template
Tim Newsome
1
-31
/
+36
2022-05-26
Check early for trigger address in fast load_func()
Tim Newsome
1
-1
/
+8
2022-05-26
Use `size` variable consistently.
Tim Newsome
1
-8
/
+8
2022-05-26
Check address for triggers before the access happens.
Tim Newsome
2
-0
/
+22
2022-05-26
Add address_match() to triggers.
Tim Newsome
2
-0
/
+44
2022-05-26
Use idiomatic iteration.
Tim Newsome
1
-5
/
+5
2022-05-16
Merge pull request #1003 from vogelpi/include-headers
Andrew Waterman
1
-0
/
+3
2022-05-16
Include recently added headers in riscv/riscv.mk.in
Pirmin Vogel
1
-0
/
+3
2022-05-13
Merge pull request #997 from riscv-software-src/simplify-decode_insn
Andrew Waterman
4
-22
/
+21
2022-05-13
Fix disassembly of custom instructions that overlap standard ones (#999)
Andrew Waterman
1
-3
/
+10
2022-05-13
Disassemble Zicbop/Zihintpause HINT instructions (#1000)
Andrew Waterman
1
-0
/
+9
2022-05-12
Update README to reflect recently added extensions
Andrew Waterman
1
-0
/
+3
2022-05-12
Add missing Zicbom and Zicbop extensions to disassembler fallback
Andrew Waterman
1
-1
/
+1
2022-05-12
Add missing Q, H, and Svinval extensions to disassembler fallback
Andrew Waterman
1
-1
/
+1
2022-05-12
Remove now-unnecessary null check from decode_insn
Andrew Waterman
1
-2
/
+2
2022-05-12
Assert that nullptrs can't make their way into the instructions list
Andrew Waterman
1
-0
/
+2
2022-05-12
Remove insn_func_t::supported field
Andrew Waterman
4
-13
/
+8
2022-05-12
Don't register instructions that aren't supported
Andrew Waterman
1
-8
/
+10
2022-05-11
Merge pull request #992 from rbuchner-aril/rb-pbmte
Andrew Waterman
4
-6
/
+37
2022-05-11
Check for reserved PBMT values during tablewalks and fault if found
Ryan Buchner
1
-0
/
+4
2022-05-11
Switch from checking for SVPBMT extension to checking *ENVCFG values during t...
Ryan Buchner
1
-2
/
+4
2022-05-11
Add PBMTE bit to menvcfg and henvcfg mask values
Ryan Buchner
1
-4
/
+8
2022-05-11
Change henvcfg csr to a henvcfg_csr_t
Ryan Buchner
3
-1
/
+22
2022-05-11
Merge pull request #994 from chihminchao/rvv-misc-2022-05-11
Andrew Waterman
1
-0
/
+1
2022-05-11
rvv: fix the checking eew and elen for index load
Chih-Min Chao
1
-0
/
+1
2022-05-09
Merge pull request #988 from riscv-software-src/factor-out-macros
Andrew Waterman
3
-2569
/
+2583
2022-05-05
Factor out P extension macros into their own header
factor-out-macros
Andrew Waterman
2
-500
/
+507
2022-05-05
Factor out V extension macros into their own header
Andrew Waterman
2
-2069
/
+2076
2022-05-05
Merge pull request #983 from soberl/epmp_updates_2
Scott Johnson
6
-13
/
+131
2022-05-05
Append smepmp extension 1.0 to the feature list
soberl
1
-0
/
+1
2022-05-04
Update pmpaddr_csr_t::access_ok() for ePMP on matching regions
soberl@nvidia.com
1
-5
/
+31
2022-05-04
Update mmu_t::pmp_ok() for ePMP in case matching region is not found
soberl@nvidia.com
1
-1
/
+5
2022-05-04
Update csr access rules for ePMP on pmpaddr and pmpcfg
soberl@nvidia.com
1
-7
/
+31
2022-05-04
Implement the new csr mseccfg for ePMP as dummy
soberl@nvidia.com
4
-0
/
+63
2022-05-04
Merge pull request #985 from riscv-software-src/trigger_hit
Andrew Waterman
2
-11
/
+18
2022-05-04
Fix the padding of register names in the log (#987)
Shaked Flur
1
-1
/
+1
2022-05-04
Linking spike_dasm misses libriscv.a dependance (#986)
jmonesti
1
-1
/
+1
2022-05-02
Use MCONTROL_TYPE_MATCH macro instead of 2
Tim Newsome
1
-1
/
+1
2022-05-02
Implement mcontrol trigger hit bit.
Tim Newsome
2
-1
/
+14
2022-04-30
Add missing description of --dtb in --help message
Andrew Waterman
1
-0
/
+1
2022-04-22
Add zknd zkne zknh zksed zksh disassembly support (#979)
Yan
1
-0
/
+70
2022-04-22
Remove mcontrol_t.h
Tim Newsome
2
-4
/
+1
2022-04-22
Merge pull request #978 from rbuchner-aril/amo-order-change-patch
Scott Johnson
1
-6
/
+8
2022-04-22
Remove maskmax as a variable.
Tim Newsome
2
-3
/
+2
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