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-rw-r--r--riscv/processor.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/riscv/processor.h b/riscv/processor.h
index 2b5003b..68e6249 100644
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -177,6 +177,11 @@ class vectorUnit_t {
reg_t elts_per_reg = (VLEN >> 3) / (sizeof(T));
vReg += n / elts_per_reg;
n = n % elts_per_reg;
+#ifdef WORDS_BIGENDIAN
+ // "V" spec 0.7.1 requires lower indices to map to lower significant
+ // bits when changing SEW, thus we need to index from the end on BE.
+ n ^= elts_per_reg - 1;
+#endif
reg_referenced[vReg] = 1;
T *regStart = (T*)((char*)reg_file + vReg * (VLEN >> 3));