diff options
Diffstat (limited to 'riscv/processor.cc')
-rw-r--r-- | riscv/processor.cc | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index 6a1ae32..8f5fc87 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -29,7 +29,7 @@ processor_t::processor_t(isa_parser_t isa, const char* varch, : debug(false), halt_request(HR_NONE), isa(isa), sim(sim), id(id), xlen(0), histogram_enabled(false), log_commits_enabled(false), log_file(log_file), sout_(sout_.rdbuf()), halt_on_reset(halt_on_reset), - impl_table(256, false), last_pc(1), executions(1) + impl_table(256, false), last_pc(1), executions(1), TM(state.num_triggers) { VU.p = this; @@ -349,9 +349,6 @@ void state_t::reset(processor_t* const proc, reg_t max_isa) csrmap[CSR_DCSR] = dcsr = std::make_shared<dcsr_csr_t>(proc, CSR_DCSR); csrmap[CSR_TSELECT] = tselect = std::make_shared<tselect_csr_t>(proc, CSR_TSELECT); - memset(this->mcontrol, 0, sizeof(this->mcontrol)); - for (auto &item : mcontrol) - item.type = 2; csrmap[CSR_TDATA1] = std::make_shared<tdata1_csr_t>(proc, CSR_TDATA1); csrmap[CSR_TDATA2] = tdata2 = std::make_shared<tdata2_csr_t>(proc, CSR_TDATA2, num_triggers); @@ -1000,13 +997,13 @@ void processor_t::trigger_updated() mmu->check_triggers_store = false; for (unsigned i = 0; i < state.num_triggers; i++) { - if (state.mcontrol[i].execute) { + if (TM.triggers[i]->execute) { mmu->check_triggers_fetch = true; } - if (state.mcontrol[i].load) { + if (TM.triggers[i]->load) { mmu->check_triggers_load = true; } - if (state.mcontrol[i].store) { + if (TM.triggers[i]->store) { mmu->check_triggers_store = true; } } |