diff options
Diffstat (limited to 'riscv/insns')
-rw-r--r-- | riscv/insns/vfredmax_vs.h | 1 | ||||
-rw-r--r-- | riscv/insns/vfredmin_vs.h | 1 | ||||
-rw-r--r-- | riscv/insns/vfredosum_vs.h | 1 | ||||
-rw-r--r-- | riscv/insns/vfredsum_vs.h | 1 | ||||
-rw-r--r-- | riscv/insns/vfwredosum_vs.h | 1 | ||||
-rw-r--r-- | riscv/insns/vfwredsum_vs.h | 1 |
6 files changed, 6 insertions, 0 deletions
diff --git a/riscv/insns/vfredmax_vs.h b/riscv/insns/vfredmax_vs.h index 1ab856b..f19ec59 100644 --- a/riscv/insns/vfredmax_vs.h +++ b/riscv/insns/vfredmax_vs.h @@ -1,4 +1,5 @@ // vfredmax vd, vs2, vs1 +bool is_propagate = false; VI_VFP_VV_LOOP_REDUCTION ({ vd_0 = f16_max(vd_0, vs2); diff --git a/riscv/insns/vfredmin_vs.h b/riscv/insns/vfredmin_vs.h index 37256cb..e3cf151 100644 --- a/riscv/insns/vfredmin_vs.h +++ b/riscv/insns/vfredmin_vs.h @@ -1,4 +1,5 @@ // vfredmin vd, vs2, vs1 +bool is_propagate = false; VI_VFP_VV_LOOP_REDUCTION ({ vd_0 = f16_min(vd_0, vs2); diff --git a/riscv/insns/vfredosum_vs.h b/riscv/insns/vfredosum_vs.h index 4564f9c..2438a7b 100644 --- a/riscv/insns/vfredosum_vs.h +++ b/riscv/insns/vfredosum_vs.h @@ -1,4 +1,5 @@ // vfredosum: vd[0] = sum( vs2[*] , vs1[0] ) +bool is_propagate = false; VI_VFP_VV_LOOP_REDUCTION ({ vd_0 = f16_add(vd_0, vs2); diff --git a/riscv/insns/vfredsum_vs.h b/riscv/insns/vfredsum_vs.h index d18b63e..bad7308 100644 --- a/riscv/insns/vfredsum_vs.h +++ b/riscv/insns/vfredsum_vs.h @@ -1,4 +1,5 @@ // vfredsum: vd[0] = sum( vs2[*] , vs1[0] ) +bool is_propagate = true; VI_VFP_VV_LOOP_REDUCTION ({ vd_0 = f16_add(vd_0, vs2); diff --git a/riscv/insns/vfwredosum_vs.h b/riscv/insns/vfwredosum_vs.h index 22fb4df..1f42d8f 100644 --- a/riscv/insns/vfwredosum_vs.h +++ b/riscv/insns/vfwredosum_vs.h @@ -1,4 +1,5 @@ // vfwredosum.vs vd, vs2, vs1 +bool is_propagate = false; VI_VFP_VV_LOOP_WIDE_REDUCTION ({ vd_0 = f32_add(vd_0, vs2); diff --git a/riscv/insns/vfwredsum_vs.h b/riscv/insns/vfwredsum_vs.h index 277cf41..4ef2896 100644 --- a/riscv/insns/vfwredsum_vs.h +++ b/riscv/insns/vfwredsum_vs.h @@ -1,4 +1,5 @@ // vfwredsum.vs vd, vs2, vs1 +bool is_propagate = true; VI_VFP_VV_LOOP_WIDE_REDUCTION ({ vd_0 = f32_add(vd_0, vs2); |