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-rw-r--r--riscv/processor.cc5
1 files changed, 5 insertions, 0 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc
index 516a708..8cca490 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -565,6 +565,11 @@ reg_t processor_t::get_csr(int which)
case CSR_MINSTRET:
case CSR_MCYCLE:
return state.minstret;
+ case CSR_INSTRETH:
+ case CSR_CYCLEH:
+ if (ctr_ok && xlen == 32)
+ return state.minstret >> 32;
+ break;
case CSR_MINSTRETH:
case CSR_MCYCLEH:
if (xlen == 32)