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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-01-06 00:09:46 -0800 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-01-13 07:28:10 -0800 |
| commit | a1ed3764b06907ab36e1a495285f54c093b85b79 (patch) | |
| tree | 8874ebb16c32e779e0163ce47892e7a888a83d61 /spike_main | |
| parent | ca648e6e24a8968f4e33ca1859d37a760004e953 (diff) | |
| download | spike-a1ed3764b06907ab36e1a495285f54c093b85b79.zip spike-a1ed3764b06907ab36e1a495285f54c093b85b79.tar.gz spike-a1ed3764b06907ab36e1a495285f54c093b85b79.tar.bz2 | |
rvv: add vmv[1248]r.v
simple register copy instructions
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'spike_main')
| -rw-r--r-- | spike_main/disasm.cc | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc index 5ecad58..addc223 100644 --- a/spike_main/disasm.cc +++ b/spike_main/disasm.cc @@ -911,10 +911,10 @@ disassembler_t::disassembler_t(int xlen) DISASM_OPIV_VX__INSN(vssubu, 0); DISASM_OPIV_VX__INSN(vssub, 1); DISASM_OPIV_VXI_INSN(vsll, 1, v); - DISASM_OPIV_VX__INSN(vaaddu, 0); - DISASM_OPIV_VX__INSN(vaadd, 0); - DISASM_OPIV_VX__INSN(vasubu, 0); - DISASM_OPIV_VX__INSN(vasub, 0); + DISASM_INSN("vmv1r.v", vmv1r_v, 0, {&vd, &vs2}); + DISASM_INSN("vmv2r.v", vmv2r_v, 0, {&vd, &vs2}); + DISASM_INSN("vmv4r.v", vmv4r_v, 0, {&vd, &vs2}); + DISASM_INSN("vmv8r.v", vmv8r_v, 0, {&vd, &vs2}); DISASM_OPIV_VX__INSN(vsmul, 1); DISASM_OPIV_VXI_INSN(vsrl, 0, v); DISASM_OPIV_VXI_INSN(vsra, 0, v); @@ -937,6 +937,11 @@ disassembler_t::disassembler_t(int xlen) //OPMVV/OPMVX //0b00_0000 + DISASM_OPIV_VX__INSN(vaaddu, 0); + DISASM_OPIV_VX__INSN(vaadd, 0); + DISASM_OPIV_VX__INSN(vasubu, 0); + DISASM_OPIV_VX__INSN(vasub, 0); + DISASM_OPIV_S___INSN(vredsum, 1); DISASM_OPIV_S___INSN(vredand, 1); DISASM_OPIV_S___INSN(vredor, 1); |