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| author | Andrew Waterman <andrew@sifive.com> | 2020-01-13 11:07:25 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-01-13 11:07:25 -0800 |
| commit | 826f05fda033d98c23cfd727ec0a769d1f2a6a46 (patch) | |
| tree | 364c5a84b39f7c3abb8801cecc6ec4b30f8d0928 /spike_main | |
| parent | bb1cd8f9e374f1730d131bfb68462c6133e4c107 (diff) | |
| parent | e75ba052d42b1af954c09adc815b541124c2ccce (diff) | |
| download | spike-826f05fda033d98c23cfd727ec0a769d1f2a6a46.zip spike-826f05fda033d98c23cfd727ec0a769d1f2a6a46.tar.gz spike-826f05fda033d98c23cfd727ec0a769d1f2a6a46.tar.bz2 | |
Merge pull request #378 from chihminchao/rvv-0.8-float64
Rvv 0.8 float64
Diffstat (limited to 'spike_main')
| -rw-r--r-- | spike_main/disasm.cc | 33 |
1 files changed, 18 insertions, 15 deletions
diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc index 373c6bb..addc223 100644 --- a/spike_main/disasm.cc +++ b/spike_main/disasm.cc @@ -911,10 +911,10 @@ disassembler_t::disassembler_t(int xlen) DISASM_OPIV_VX__INSN(vssubu, 0); DISASM_OPIV_VX__INSN(vssub, 1); DISASM_OPIV_VXI_INSN(vsll, 1, v); - DISASM_OPIV_VX__INSN(vaaddu, 0); - DISASM_OPIV_VX__INSN(vaadd, 0); - DISASM_OPIV_VX__INSN(vasubu, 0); - DISASM_OPIV_VX__INSN(vasub, 0); + DISASM_INSN("vmv1r.v", vmv1r_v, 0, {&vd, &vs2}); + DISASM_INSN("vmv2r.v", vmv2r_v, 0, {&vd, &vs2}); + DISASM_INSN("vmv4r.v", vmv4r_v, 0, {&vd, &vs2}); + DISASM_INSN("vmv8r.v", vmv8r_v, 0, {&vd, &vs2}); DISASM_OPIV_VX__INSN(vsmul, 1); DISASM_OPIV_VXI_INSN(vsrl, 0, v); DISASM_OPIV_VXI_INSN(vsra, 0, v); @@ -937,6 +937,11 @@ disassembler_t::disassembler_t(int xlen) //OPMVV/OPMVX //0b00_0000 + DISASM_OPIV_VX__INSN(vaaddu, 0); + DISASM_OPIV_VX__INSN(vaadd, 0); + DISASM_OPIV_VX__INSN(vasubu, 0); + DISASM_OPIV_VX__INSN(vasub, 0); + DISASM_OPIV_S___INSN(vredsum, 1); DISASM_OPIV_S___INSN(vredand, 1); DISASM_OPIV_S___INSN(vredor, 1); @@ -1037,23 +1042,19 @@ disassembler_t::disassembler_t(int xlen) add_insn(new disasm_insn_t(#name ".vf", match_##name##_vf, mask_##name##_vf, \ {&vd, &vs2, &frs1, &opt, &vm})); \ - #define DISASM_VFUNARY0_INSN(name, extra, suf) \ + #define DISASM_VFUNARY0_INSN(name, suf) \ add_insn(new disasm_insn_t(#name "cvt.xu.f." #suf, \ match_##name##cvt_xu_f_##suf, mask_##name##cvt_xu_f_##suf, \ {&vd, &vs2, &opt, &vm})); \ add_insn(new disasm_insn_t(#name "cvt.x.f." #suf, \ - match_##name##cvt_xu_f_##suf, mask_##name##cvt_xu_f_##suf, \ + match_##name##cvt_x_f_##suf, mask_##name##cvt_x_f_##suf, \ {&vd, &vs2, &opt, &vm})); \ add_insn(new disasm_insn_t(#name "cvt.f.xu." #suf, \ - match_##name##cvt_xu_f_##suf, mask_##name##cvt_xu_f_##suf, \ + match_##name##cvt_f_xu_##suf, mask_##name##cvt_f_xu_##suf, \ {&vd, &vs2, &opt, &vm})); \ add_insn(new disasm_insn_t(#name "cvt.f.x." #suf, \ - match_##name##cvt_xu_f_##suf, mask_##name##cvt_xu_f_##suf, \ + match_##name##cvt_f_x_##suf, mask_##name##cvt_f_x_##suf, \ {&vd, &vs2, &opt, &vm})); \ - if (extra) \ - add_insn(new disasm_insn_t(#name "cvt.f.f." #suf, \ - match_##name##cvt_xu_f_##suf, mask_##name##cvt_xu_f_##suf, \ - {&vd, &vs2, &opt, &vm})); \ //OPFVV/OPFVF //0b01_0000 @@ -1086,11 +1087,13 @@ disassembler_t::disassembler_t(int xlen) DISASM_OPIV__F_INSN(vfrdiv); //vfunary0 - DISASM_VFUNARY0_INSN(vf, 0, v); + DISASM_VFUNARY0_INSN(vf, v); - DISASM_VFUNARY0_INSN(vfw, 1, v); + DISASM_VFUNARY0_INSN(vfw, v); + DISASM_INSN("vfwcvt.f.f.v", vfwcvt_f_f_v, 0, {&vd, &vs2, &opt, &vm}); - DISASM_VFUNARY0_INSN(vfn, 1, w); + DISASM_VFUNARY0_INSN(vfn, w); + DISASM_INSN("vfncvt.f.f.w", vfncvt_rod_f_f_w, 0, {&vd, &vs2, &opt, &vm}); DISASM_INSN("vfncvt.rod.f.f.w", vfncvt_rod_f_f_w, 0, {&vd, &vs2, &opt, &vm}); //vfunary1 |