Add a tool "spike-log-parser" to get the instruction name from spike log.

Usage:
./spike-log-parser < $(log_file)

Here is the example log:
x15 a5 <- 0x000000008004935e 2147783518
core   0: 0x000000008000c362 (0xca278793) addi    a5, a5, -862
x15 a5 <- 0x0000000080049000 2147782656
core   0: 0x000000008000c366 (0x0000639c) c.ld    a5, 0(a5)
x15 a5 <- 0x0000000000000000 0
core   0: 0x000000008000c368 (0xfef43423) sd      a5, -24(s0)

The output will be:
addi
c.ld
sd

1 files changed, 60 insertions, 0 deletions

diff --git a/spike_main/spike-log-parser.cc b/spike_main/spike-log-parser.cc
new file mode 100644
index 0000000..9a08670
--- /dev/null
+++ b/spike_main/spike-log-parser.cc
@@ -0,0 +1,60 @@
+// See LICENSE for license details.
+
+// This little program finds occurrences of strings like
+//   core   0: 0x000000008000c36c (0xfe843783) ld      a5, -24(s0)
+// in its inputs, then output the RISC-V instruction with the disassembly
+// enclosed hexadecimal number.
+
+#include <iostream>
+#include <string>
+#include <cstdint>
+#include <regex>
+#include "fesvr/option_parser.h"
+
+#include "disasm.h"
+#include "extension.h"
+
+using namespace std;
+
+int main(int argc, char** argv)
+{
+    string s;
+    const char* isa = DEFAULT_ISA;
+
+    std::function<extension_t*()> extension;
+    option_parser_t parser;
+    parser.option(0, "extension", 1, [&](const char* s){extension = find_extension(s);});
+    parser.option(0, "isa", 1, [&](const char* s){isa = s;});
+    parser.parse(argv);
+
+    processor_t p(isa, DEFAULT_VARCH, 0, 0);
+    if (extension) {
+        p.register_extension(extension());
+    }
+
+    std::regex reg("^core\\s+\\d+:\\s+0x[0-9a-f]+\\s+\\(0x([0-9a-f]+)\\)", std::regex_constants::icase);
+    std::smatch m;
+    std::ssub_match sm ;
+
+    while (getline(cin,s)){
+        if(regex_search(s, m, reg)){
+            // the opcode string
+            string op = m[1].str();
+            uint32_t bit_num = op.size() * 4;
+            uint64_t opcode = strtoull(op.c_str(), nullptr, 16);
+
+            if (bit_num<64){
+                opcode = opcode << (64-bit_num) >> (64-bit_num);
+            }
+
+            const disasm_insn_t* disasm = p.get_disassembler()->lookup(opcode);
+            if (disasm) {
+                cout << disasm->get_name() << '\n';
+            } else {
+                cout << "unknown_op\n";
+            }
+        }
+    }
+
+    return 0;
+}