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author | Dave.Wen <dave.wen@sifive.com> | 2019-04-01 17:27:56 -0700 |
---|---|---|
committer | Dave.Wen <dave.wen@sifive.com> | 2019-04-01 17:27:56 -0700 |
commit | e92b76f5bbc8b2bd4567cb0075ace89897c07d61 (patch) | |
tree | ed09382dc0ae7a615c33153951ffca8aa8dbb6a8 /riscv | |
parent | 4018782a78fa7a546b61fc5006bf9b04252ab186 (diff) | |
download | spike-e92b76f5bbc8b2bd4567cb0075ace89897c07d61.zip spike-e92b76f5bbc8b2bd4567cb0075ace89897c07d61.tar.gz spike-e92b76f5bbc8b2bd4567cb0075ace89897c07d61.tar.bz2 |
rvv: add vred[and|or|xor]_vv, vredmax[u]_vv, vredmin[u]_vv, vredsum_vv
Diffstat (limited to 'riscv')
-rw-r--r-- | riscv/insns/vredand_vv.h | 4 | ||||
-rw-r--r-- | riscv/insns/vredmax_vv.h | 6 | ||||
-rw-r--r-- | riscv/insns/vredmaxu_vv.h | 6 | ||||
-rw-r--r-- | riscv/insns/vredmin_vv.h | 7 | ||||
-rw-r--r-- | riscv/insns/vredminu_vv.h | 7 | ||||
-rw-r--r-- | riscv/insns/vredor_vv.h | 4 | ||||
-rw-r--r-- | riscv/insns/vredsum_vv.h | 5 | ||||
-rw-r--r-- | riscv/insns/vredxor_vv.h | 4 |
8 files changed, 27 insertions, 16 deletions
diff --git a/riscv/insns/vredand_vv.h b/riscv/insns/vredand_vv.h index 675c831..28f2f99 100644 --- a/riscv/insns/vredand_vv.h +++ b/riscv/insns/vredand_vv.h @@ -1,5 +1,5 @@ // vredand -VI_VV_LOOP +VI_VV_REDUCTION_LOOP ({ - // NOT IMPLEMENTED YET + vd_0 &= vs2; }) diff --git a/riscv/insns/vredmax_vv.h b/riscv/insns/vredmax_vv.h index 4f74982..1608d79 100644 --- a/riscv/insns/vredmax_vv.h +++ b/riscv/insns/vredmax_vv.h @@ -1,5 +1,7 @@ // vredmax -VI_VV_LOOP +VI_VV_REDUCTION_LOOP ({ - // NOT IMPLEMENTED YET + if (vs2 > vd_0){ + vd_0 = vsext(vs2, sew); + } }) diff --git a/riscv/insns/vredmaxu_vv.h b/riscv/insns/vredmaxu_vv.h index d98b601..fe51942 100644 --- a/riscv/insns/vredmaxu_vv.h +++ b/riscv/insns/vredmaxu_vv.h @@ -1,5 +1,7 @@ // vredmaxu -VI_VV_LOOP +VI_VV_REDUCTION_LOOP ({ - // NOT IMPLEMENTED YET + if (vs2 > vd_0){ + vd_0 = vzext(vs2, sew); + } }) diff --git a/riscv/insns/vredmin_vv.h b/riscv/insns/vredmin_vv.h index e05c20a..21914cb 100644 --- a/riscv/insns/vredmin_vv.h +++ b/riscv/insns/vredmin_vv.h @@ -1,5 +1,8 @@ // vredmin -VI_VV_LOOP +VI_VV_REDUCTION_LOOP ({ - // NOT IMPLEMENTED YET + if (vs2 < vd_0){ + vd_0 = vsext(vs2, sew); + } + }) diff --git a/riscv/insns/vredminu_vv.h b/riscv/insns/vredminu_vv.h index 7985584..1cc1955 100644 --- a/riscv/insns/vredminu_vv.h +++ b/riscv/insns/vredminu_vv.h @@ -1,5 +1,8 @@ // vredminu -VI_VV_LOOP +VI_VV_REDUCTION_LOOP ({ - // NOT IMPLEMENTED YET + if (vs2 < vd_0){ + vd_0 = vzext(vs2, sew); + } + }) diff --git a/riscv/insns/vredor_vv.h b/riscv/insns/vredor_vv.h index a93d485..f85e2b1 100644 --- a/riscv/insns/vredor_vv.h +++ b/riscv/insns/vredor_vv.h @@ -1,5 +1,5 @@ // vredor -VI_VV_LOOP +VI_VV_REDUCTION_LOOP ({ - // NOT IMPLEMENTED YET + vd_0 |= vs2; }) diff --git a/riscv/insns/vredsum_vv.h b/riscv/insns/vredsum_vv.h index 05d4eca..95c9081 100644 --- a/riscv/insns/vredsum_vv.h +++ b/riscv/insns/vredsum_vv.h @@ -1,5 +1,6 @@ // vredsum -VI_VV_LOOP +VI_VV_REDUCTION_LOOP ({ - // NOT IMPLEMENTED YET + vd_0 += vs2; }) + diff --git a/riscv/insns/vredxor_vv.h b/riscv/insns/vredxor_vv.h index 8957747..db086e3 100644 --- a/riscv/insns/vredxor_vv.h +++ b/riscv/insns/vredxor_vv.h @@ -1,5 +1,5 @@ // vredxor -VI_VV_LOOP +VI_VV_REDUCTION_LOOP ({ - // NOT IMPLEMENTED YET + vd_0 ^= vs2; }) |