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author | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-07-06 10:43:57 +0800 |
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committer | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-07-07 08:32:54 +0800 |
commit | 9b66f89b8102f032f721fe332819325508aa3b95 (patch) | |
tree | 38b71303de40d374190ae2261cae1d1d1a87a168 /riscv | |
parent | 45b9b9c2940704c6e2d77f04450abb2155dbb8b7 (diff) | |
download | spike-9b66f89b8102f032f721fe332819325508aa3b95.zip spike-9b66f89b8102f032f721fe332819325508aa3b95.tar.gz spike-9b66f89b8102f032f721fe332819325508aa3b95.tar.bz2 |
modify mstatush_csr_t to general rv32_high_csr_t
Diffstat (limited to 'riscv')
-rw-r--r-- | riscv/csrs.cc | 20 | ||||
-rw-r--r-- | riscv/csrs.h | 10 | ||||
-rw-r--r-- | riscv/processor.cc | 6 |
3 files changed, 23 insertions, 13 deletions
diff --git a/riscv/csrs.cc b/riscv/csrs.cc index 7d1be10..b8fa920 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -493,19 +493,23 @@ bool mstatus_csr_t::unlogged_write(const reg_t val) noexcept { return true; } -// implement class mstatush_csr_t -mstatush_csr_t::mstatush_csr_t(processor_t* const proc, const reg_t addr, mstatus_csr_t_p mstatus): +// implement class rv32_high_csr_t +rv32_high_csr_t::rv32_high_csr_t(processor_t* const proc, const reg_t addr, const reg_t mask, csr_t_p orig): csr_t(proc, addr), - mstatus(mstatus), - mask(MSTATUSH_MPV | MSTATUSH_GVA | MSTATUSH_SBE | MSTATUSH_MBE) { + orig(orig), + mask(mask) { +} + +reg_t rv32_high_csr_t::read() const noexcept { + return (orig->read() >> 32) & mask; } -reg_t mstatush_csr_t::read() const noexcept { - return (mstatus->read() >> 32) & mask; +void rv32_high_csr_t::verify_permissions(insn_t insn, bool write) const { + orig->verify_permissions(insn, write); } -bool mstatush_csr_t::unlogged_write(const reg_t val) noexcept { - return mstatus->unlogged_write((mstatus->written_value() & ~(mask << 32)) | ((val & mask) << 32)); +bool rv32_high_csr_t::unlogged_write(const reg_t val) noexcept { + return orig->unlogged_write((orig->written_value() & ~(mask << 32)) | ((val & mask) << 32)); } // implement class sstatus_csr_t diff --git a/riscv/csrs.h b/riscv/csrs.h index ab3cdb7..03a3ed6 100644 --- a/riscv/csrs.h +++ b/riscv/csrs.h @@ -53,6 +53,8 @@ class csr_t { private: const unsigned csr_priv; const bool csr_read_only; + + friend class rv32_high_csr_t; }; typedef std::shared_ptr<csr_t> csr_t_p; @@ -243,19 +245,19 @@ class mstatus_csr_t final: public base_status_csr_t { virtual bool unlogged_write(const reg_t val) noexcept override; private: reg_t val; - friend class mstatush_csr_t; }; typedef std::shared_ptr<mstatus_csr_t> mstatus_csr_t_p; -class mstatush_csr_t: public csr_t { +class rv32_high_csr_t: public csr_t { public: - mstatush_csr_t(processor_t* const proc, const reg_t addr, mstatus_csr_t_p mstatus); + rv32_high_csr_t(processor_t* const proc, const reg_t addr, const reg_t mask, csr_t_p orig); virtual reg_t read() const noexcept override; + virtual void verify_permissions(insn_t insn, bool write) const override; protected: virtual bool unlogged_write(const reg_t val) noexcept override; private: - mstatus_csr_t_p mstatus; + csr_t_p orig; const reg_t mask; }; diff --git a/riscv/processor.cc b/riscv/processor.cc index c4ca0bc..7ffc8d1 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -190,7 +190,11 @@ void state_t::reset(processor_t* const proc, reg_t max_isa) v = false; csrmap[CSR_MISA] = misa = std::make_shared<misa_csr_t>(proc, CSR_MISA, max_isa); csrmap[CSR_MSTATUS] = mstatus = std::make_shared<mstatus_csr_t>(proc, CSR_MSTATUS); - if (xlen == 32) csrmap[CSR_MSTATUSH] = std::make_shared<mstatush_csr_t>(proc, CSR_MSTATUSH, mstatus); + + if (xlen == 32) { + const reg_t mstatush_mask = MSTATUSH_MPV | MSTATUSH_GVA | MSTATUSH_SBE | MSTATUSH_MBE; + csrmap[CSR_MSTATUSH] = std::make_shared<rv32_high_csr_t>(proc, CSR_MSTATUSH, mstatush_mask, mstatus); + } csrmap[CSR_MEPC] = mepc = std::make_shared<epc_csr_t>(proc, CSR_MEPC); csrmap[CSR_MTVAL] = mtval = std::make_shared<basic_csr_t>(proc, CSR_MTVAL, 0); csrmap[CSR_MSCRATCH] = std::make_shared<basic_csr_t>(proc, CSR_MSCRATCH, 0); |