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authorEric Gouriou <ego@rivosinc.com>2023-06-18 17:10:53 -0700
committerEric Gouriou <ego@rivosinc.com>2023-06-19 14:30:03 -0700
commitd5c0339484323b5a9498576d70ec90eab2e13438 (patch)
treead788f77140ff7eaf07ec75c5369441e9589dc29 /riscv/vector_unit.h
parent1e5a71f99b3432ba9fb543995a466c2d96e96cec (diff)
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Zvk: Infrastructure for Zvk extensions, element group handling
Introduce types and macros useful across multiple Zvk sub-extensions, including Zvbb and Zvbc. Those will be used by upcoming per-sub-extension commits. In particular we introduce "Element Group" types and loop macros handling those element groups. The concept of element group is described in <https://github.com/riscv/riscv-crypto/blob/master/doc/vector/riscv-crypto-vector-element-groups.adoc>. Note that the element group access method is not implemented for WORDS_BIGENDIAN setup. As such, isa_parser.cc is modified to emit an error when WORDS_BIGENDIAN is defined and extensions using element groups are enabled. Signed-off-by: Eric Gouriou <ego@rivosinc.com>
Diffstat (limited to 'riscv/vector_unit.h')
-rw-r--r--riscv/vector_unit.h19
1 files changed, 18 insertions, 1 deletions
diff --git a/riscv/vector_unit.h b/riscv/vector_unit.h
index b9f706c..a057c62 100644
--- a/riscv/vector_unit.h
+++ b/riscv/vector_unit.h
@@ -2,6 +2,9 @@
#ifndef _RISCV_VECTOR_UNIT_H
#define _RISCV_VECTOR_UNIT_H
+#include <array>
+#include <cstdint>
+
#include "decode.h"
#include "csrs.h"
@@ -69,6 +72,17 @@ struct type_sew_t<64>
using type=int64_t;
};
+// Element Group of 4 32 bits elements (128b total).
+using EGU32x4_t = std::array<uint32_t, 4>;
+
+// Element Group of 8 32 bits elements (256b total).
+using EGU32x8_t = std::array<uint32_t, 8>;
+
+// Element Group of 4 64 bits elements (256b total).
+using EGU64x4_t = std::array<uint64_t, 4>;
+
+// Element Group of 16 8 bits elements (128b total).
+using EGU8x16_t = std::array<uint8_t, 16>;
class vectorUnit_t
{
@@ -88,8 +102,11 @@ public:
bool vill;
bool vstart_alu;
- // vector element for varies SEW
+ // vector element for various SEW
template<class T> T& elt(reg_t vReg, reg_t n, bool is_write = false);
+ // vector element group access, where EG is a std::array<T, N>.
+ template<typename EG> EG&
+ elt_group(reg_t vReg, reg_t n, bool is_write = false);
public: