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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-03-12 17:32:43 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-03-12 17:32:43 -0700 |
| commit | ea58df801f36605b462783a61b5266bdd9a40eb0 (patch) | |
| tree | ec6c4736f29e9f2021a9e448946e0a0169639cc1 /riscv/trap.h | |
| parent | 9af855a28e7dc4009ad31312840ca6f9396d572e (diff) | |
| download | spike-ea58df801f36605b462783a61b5266bdd9a40eb0.zip spike-ea58df801f36605b462783a61b5266bdd9a40eb0.tar.gz spike-ea58df801f36605b462783a61b5266bdd9a40eb0.tar.bz2 | |
Update to new privileged spec
Sorry, everyone.
Diffstat (limited to 'riscv/trap.h')
| -rw-r--r-- | riscv/trap.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/riscv/trap.h b/riscv/trap.h index 53df4f4..7110073 100644 --- a/riscv/trap.h +++ b/riscv/trap.h @@ -45,14 +45,12 @@ class mem_trap_t : public trap_t DECLARE_MEM_TRAP(CAUSE_MISALIGNED_FETCH, instruction_address_misaligned) DECLARE_MEM_TRAP(CAUSE_FAULT_FETCH, instruction_access_fault) DECLARE_TRAP(CAUSE_ILLEGAL_INSTRUCTION, illegal_instruction) -DECLARE_TRAP(CAUSE_PRIVILEGED_INSTRUCTION, privileged_instruction) -DECLARE_TRAP(CAUSE_FP_DISABLED, fp_disabled) -DECLARE_TRAP(CAUSE_SYSCALL, syscall) +DECLARE_TRAP(CAUSE_SCALL, scall) +DECLARE_TRAP(CAUSE_MCALL, mcall) DECLARE_TRAP(CAUSE_BREAKPOINT, breakpoint) DECLARE_MEM_TRAP(CAUSE_MISALIGNED_LOAD, load_address_misaligned) DECLARE_MEM_TRAP(CAUSE_MISALIGNED_STORE, store_address_misaligned) DECLARE_MEM_TRAP(CAUSE_FAULT_LOAD, load_access_fault) DECLARE_MEM_TRAP(CAUSE_FAULT_STORE, store_access_fault) -DECLARE_TRAP(CAUSE_ACCELERATOR_DISABLED, accelerator_disabled) #endif |