From ea58df801f36605b462783a61b5266bdd9a40eb0 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Thu, 12 Mar 2015 17:32:43 -0700 Subject: Update to new privileged spec Sorry, everyone. --- riscv/trap.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'riscv/trap.h') diff --git a/riscv/trap.h b/riscv/trap.h index 53df4f4..7110073 100644 --- a/riscv/trap.h +++ b/riscv/trap.h @@ -45,14 +45,12 @@ class mem_trap_t : public trap_t DECLARE_MEM_TRAP(CAUSE_MISALIGNED_FETCH, instruction_address_misaligned) DECLARE_MEM_TRAP(CAUSE_FAULT_FETCH, instruction_access_fault) DECLARE_TRAP(CAUSE_ILLEGAL_INSTRUCTION, illegal_instruction) -DECLARE_TRAP(CAUSE_PRIVILEGED_INSTRUCTION, privileged_instruction) -DECLARE_TRAP(CAUSE_FP_DISABLED, fp_disabled) -DECLARE_TRAP(CAUSE_SYSCALL, syscall) +DECLARE_TRAP(CAUSE_SCALL, scall) +DECLARE_TRAP(CAUSE_MCALL, mcall) DECLARE_TRAP(CAUSE_BREAKPOINT, breakpoint) DECLARE_MEM_TRAP(CAUSE_MISALIGNED_LOAD, load_address_misaligned) DECLARE_MEM_TRAP(CAUSE_MISALIGNED_STORE, store_address_misaligned) DECLARE_MEM_TRAP(CAUSE_FAULT_LOAD, load_access_fault) DECLARE_MEM_TRAP(CAUSE_FAULT_STORE, store_access_fault) -DECLARE_TRAP(CAUSE_ACCELERATOR_DISABLED, accelerator_disabled) #endif -- cgit v1.1