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authorChih-Min Chao <chihmin.chao@sifive.com>2022-02-21 19:04:14 -0800
committerChih-Min Chao <chihmin.chao@sifive.com>2022-02-23 19:13:20 -0800
commit90f21e1013941fc5ac10552a05665c3db192c162 (patch)
treecd5c1de444c1b2a6eeeb6c5c4db41160d2898c99 /riscv/sim.cc
parent7fd56cfbb0301b06b3e8d45577c3487deddc9c94 (diff)
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pmp: dts: handle the absence of mmu and pmp in dts
If there is no 'mmu-type', we treat it as no mmu implementation If there is no 'riscv,pmpregions', we treat it as no pmp implementation Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/sim.cc')
-rw-r--r--riscv/sim.cc14
1 files changed, 13 insertions, 1 deletions
diff --git a/riscv/sim.cc b/riscv/sim.cc
index ad7e45b..8648d5a 100644
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -128,7 +128,17 @@ sim_t::sim_t(const char* isa, const char* priv, const char* varch,
//handle pmp
reg_t pmp_num = 0, pmp_granularity = 0;
if (fdt_parse_pmp_num(fdt, cpu_offset, &pmp_num) == 0) {
- procs[cpu_idx]->set_pmp_num(pmp_num);
+ if (pmp_num <= 64) {
+ procs[cpu_idx]->set_pmp_num(pmp_num);
+ } else {
+ std::cerr << "core ("
+ << hartids.size()
+ << ") doesn't have valid 'riscv,pmpregions'"
+ << pmp_num << ").\n";
+ exit(1);
+ }
+ } else {
+ procs[cpu_idx]->set_pmp_num(0);
}
if (fdt_parse_pmp_alignment(fdt, cpu_offset, &pmp_granularity) == 0) {
@@ -155,6 +165,8 @@ sim_t::sim_t(const char* isa, const char* priv, const char* varch,
<< mmu_type << ").\n";
exit(1);
}
+ } else {
+ procs[cpu_idx]->set_mmu_capability(IMPL_MMU_SBARE);
}
cpu_idx++;