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authorChih-Min Chao <chihmin.chao@sifive.com>2019-06-10 00:22:12 -0700
committerChih-Min Chao <chihmin.chao@sifive.com>2019-06-10 01:41:48 -0700
commitf141dd836ecd36db38d114348296837249abdac8 (patch)
treec94a769cbba2f8a928ccf7f661edb4b3f4210fb7 /riscv/riscv.mk.in
parent6363d4cbcf258521fd404dc1e86346ec0b3f4483 (diff)
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rvv: fix widen fpu zero and function
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/riscv.mk.in')
-rw-r--r--riscv/riscv.mk.in1
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index 249109a..e847a13 100644
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -560,6 +560,7 @@ riscv_insn_ext_v_alu_fp = \
vfwnmsac_vv \
vfwredosum_vs \
vfwredsum_vs \
+ vfwsub_vf \
vfwsub_vv \
vfwsub_wv \
vmfeq_vf \