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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-06-04 00:25:24 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-06-04 01:03:40 -0700 |
| commit | b8cf978cfe9c2cc65a925c97cb2694b114de3637 (patch) | |
| tree | 943eb320297f88cc21449b5ee0dd0ca8fa753090 /riscv/riscv.mk.in | |
| parent | e34025ba43101dc23fc4b68565dd7c206864351a (diff) | |
| download | spike-b8cf978cfe9c2cc65a925c97cb2694b114de3637.zip spike-b8cf978cfe9c2cc65a925c97cb2694b114de3637.tar.gz spike-b8cf978cfe9c2cc65a925c97cb2694b114de3637.tar.bz2 | |
rvv: change vseq.?? to vmseq.?? and related insns
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/riscv.mk.in')
| -rw-r--r-- | riscv/riscv.mk.in | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 354662e..2450d29 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -342,7 +342,27 @@ riscv_insn_ext_v_alu_int = \ vmsac_vv \ vmsac_vx \ vmsbf_m \ + vmseq_vi \ + vmseq_vv \ + vmseq_vx \ + vmsgt_vi \ + vmsgt_vx \ + vmsgtu_vi \ + vmsgtu_vx \ vmsif_m \ + vmsle_vi \ + vmsle_vv \ + vmsle_vx \ + vmsleu_vi \ + vmsleu_vv \ + vmsleu_vx \ + vmslt_vv \ + vmslt_vx \ + vmsltu_vv \ + vmsltu_vx \ + vmsne_vi \ + vmsne_vv \ + vmsne_vx \ vmsof_m \ vmsub_vv \ vmsub_vx \ @@ -397,19 +417,6 @@ riscv_insn_ext_v_alu_int = \ vsaddu_vx \ vsbc_vv \ vsbc_vx \ - vseq_vi \ - vseq_vv \ - vseq_vx \ - vsgt_vi \ - vsgt_vx \ - vsgtu_vi \ - vsgtu_vx \ - vsle_vi \ - vsle_vv \ - vsle_vx \ - vsleu_vi \ - vsleu_vv \ - vsleu_vx \ vslide1down_vx \ vslide1up_vx \ vslidedown_vi \ @@ -419,15 +426,8 @@ riscv_insn_ext_v_alu_int = \ vsll_vi \ vsll_vv \ vsll_vx \ - vslt_vv \ - vslt_vx \ - vsltu_vv \ - vsltu_vx \ vsmul_vv \ vsmul_vx \ - vsne_vi \ - vsne_vv \ - vsne_vx \ vsra_vi \ vsra_vv \ vsra_vx \ |