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| author | Andrew Waterman <andrew@sifive.com> | 2020-05-09 23:58:09 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-19 19:57:02 -0700 |
| commit | 1e0fab92b1d6f350fc1f4f0093f5976588bd3afa (patch) | |
| tree | 0cf8e1ddd6cf73cb59cdc6b7200d36c6d075f6bf /riscv/processor.h | |
| parent | e98630e79af962bc203e85f4e446d5a328df12d5 (diff) | |
| download | spike-1e0fab92b1d6f350fc1f4f0093f5976588bd3afa.zip spike-1e0fab92b1d6f350fc1f4f0093f5976588bd3afa.tar.gz spike-1e0fab92b1d6f350fc1f4f0093f5976588bd3afa.tar.bz2 | |
Support consuming PMP number and granularity from DTB
The feature itself isn't implemented yet.
Diffstat (limited to 'riscv/processor.h')
| -rw-r--r-- | riscv/processor.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/riscv/processor.h b/riscv/processor.h index 82416f7..52dbf3e 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -389,6 +389,9 @@ public: void trigger_updated(); + void set_pmp_num(reg_t pmp_num); + void set_pmp_granularity(reg_t pmp_granularity); + private: simif_t* sim; mmu_t* mmu; // main memory is always accessed via the mmu @@ -434,6 +437,9 @@ private: // Track repeated executions for processor_t::disasm() uint64_t last_pc, last_bits, executions; + reg_t n_pmp; + reg_t lg_pmp_granularity; + public: class vectorUnit_t { public: |