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author | Tim Newsome <tim@sifive.com> | 2017-09-21 12:42:20 -0700 |
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committer | Andrew Waterman <aswaterman@gmail.com> | 2017-09-21 12:42:20 -0700 |
commit | b86f2a51f522f020ad0d90f598f4c501f41da232 (patch) | |
tree | 2c466d6f2c5a8a22f266d607f6e95b95f8dcc33a /riscv/processor.h | |
parent | c471f5d84e2fc27e3eb4c2997635d3f2c83d7818 (diff) | |
download | spike-b86f2a51f522f020ad0d90f598f4c501f41da232.zip spike-b86f2a51f522f020ad0d90f598f4c501f41da232.tar.gz spike-b86f2a51f522f020ad0d90f598f4c501f41da232.tar.bz2 |
Fix corner case in repeated execution (#127)
Specifically, don't print out the execution count if the same
instruction is executed by different harts.
Diffstat (limited to 'riscv/processor.h')
-rw-r--r-- | riscv/processor.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/riscv/processor.h b/riscv/processor.h index 6e8d684..2d82d91 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -316,6 +316,9 @@ private: void build_opcode_map(); void register_base_instructions(); insn_func_t decode_insn(insn_t insn); + + // Track repeated executions for processor_t::disasm() + uint64_t last_pc, last_bits, executions; }; reg_t illegal_instruction(processor_t* p, insn_t insn, reg_t pc); |