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| author | Andrew Waterman <andrew@sifive.com> | 2020-02-21 12:12:57 -0800 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-03-03 22:48:23 -0800 |
| commit | ff1b5fab38f0d8ddb364bcbb621a172c1834d077 (patch) | |
| tree | 0c5644e1961a125cbd47f0f1858b5fdd5f127177 /riscv/processor.cc | |
| parent | a4f6ec0441285525130e07361213fae0b36b8b47 (diff) | |
| download | spike-ff1b5fab38f0d8ddb364bcbb621a172c1834d077.zip spike-ff1b5fab38f0d8ddb364bcbb621a172c1834d077.tar.gz spike-ff1b5fab38f0d8ddb364bcbb621a172c1834d077.tar.bz2 | |
Initialize some uninitialized state
Diffstat (limited to 'riscv/processor.cc')
| -rw-r--r-- | riscv/processor.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index 9e74bc2..7eacd57 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -274,6 +274,8 @@ void state_t::reset(reg_t max_isa) memset(this->tdata2, 0, sizeof(this->tdata2)); debug_mode = false; + single_step = STEP_NONE; + memset(this->mcontrol, 0, sizeof(this->mcontrol)); memset(this->pmpcfg, 0, sizeof(this->pmpcfg)); memset(this->pmpaddr, 0, sizeof(this->pmpaddr)); |