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author | Andrew Waterman <andrew@sifive.com> | 2024-05-31 01:24:02 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2024-05-31 01:24:02 -0700 |
commit | 759599553bab6c95399253ba366a0f5b1b3dd48f (patch) | |
tree | 8f84650d9d8c783ee582c8d2956cce995fd8dca1 /riscv/processor.cc | |
parent | 148e6d63e036a611537f7afbee771d9b83d348fb (diff) | |
download | spike-759599553bab6c95399253ba366a0f5b1b3dd48f.zip spike-759599553bab6c95399253ba366a0f5b1b3dd48f.tar.gz spike-759599553bab6c95399253ba366a0f5b1b3dd48f.tar.bz2 |
Avoid checking ELP before every instruction fetch
Serialize after setting ELP. That way, we can hoist the check
outside of the main simulation loop.
Diffstat (limited to 'riscv/processor.cc')
-rw-r--r-- | riscv/processor.cc | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index 0564731..da49a37 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -94,14 +94,6 @@ processor_t::~processor_t() delete disassembler; } -static void zicfilp_check_if_lpad_required(const elp_t elp, insn_t insn) -{ - if (unlikely(elp == elp_t::LP_EXPECTED)) { - // also see riscv/lpad.h for more checks performed - software_check((insn.bits() & MASK_LPAD) == MATCH_LPAD, LANDING_PAD_FAULT); - } -} - static void bad_option_string(const char *option, const char *value, const char *msg) { @@ -991,9 +983,13 @@ const char* processor_t::get_symbol(uint64_t addr) return sim->get_symbol(addr); } -void processor_t::execute_insn_prehook(insn_t insn) +void processor_t::check_if_lpad_required() { - zicfilp_check_if_lpad_required(state.elp, insn); + if (unlikely(state.elp == elp_t::LP_EXPECTED)) { + // also see insns/lpad.h for more checks performed + insn_fetch_t fetch = mmu->load_insn(state.pc); + software_check((fetch.insn.bits() & MASK_LPAD) == MATCH_LPAD, LANDING_PAD_FAULT); + } } void processor_t::disasm(insn_t insn) |