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| author | Andrew Waterman <andrew@sifive.com> | 2022-08-08 20:00:43 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-08-08 20:00:43 -0700 |
| commit | dd9bf0d3de2dccea483723f6e5f9cf8cfc2e05e1 (patch) | |
| tree | 620a71cafcfe5b10b04bd1488a99b5dae786d3cd /riscv/processor.cc | |
| parent | 5672c4a41ad7a9af011d385962c175a5a6012fd9 (diff) | |
| parent | a7de776de66a1c1caea8d896e6ff51503b0a46bf (diff) | |
| download | spike-dd9bf0d3de2dccea483723f6e5f9cf8cfc2e05e1.zip spike-dd9bf0d3de2dccea483723f6e5f9cf8cfc2e05e1.tar.gz spike-dd9bf0d3de2dccea483723f6e5f9cf8cfc2e05e1.tar.bz2 | |
Merge pull request #1059 from plctlab/plct-stateen-fix
add stateen related check to frm/fflags
Diffstat (limited to 'riscv/processor.cc')
| -rw-r--r-- | riscv/processor.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index 0389707..0325c51 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -393,7 +393,7 @@ void state_t::reset(processor_t* const proc, reg_t max_isa) csrmap[CSR_FFLAGS] = fflags = std::make_shared<float_csr_t>(proc, CSR_FFLAGS, FSR_AEXC >> FSR_AEXC_SHIFT, 0); csrmap[CSR_FRM] = frm = std::make_shared<float_csr_t>(proc, CSR_FRM, FSR_RD >> FSR_RD_SHIFT, 0); assert(FSR_AEXC_SHIFT == 0); // composite_csr_t assumes fflags begins at bit 0 - csrmap[CSR_FCSR] = std::make_shared<fcsr_csr_t>(proc, CSR_FCSR, frm, fflags, FSR_RD_SHIFT); + csrmap[CSR_FCSR] = std::make_shared<composite_csr_t>(proc, CSR_FCSR, frm, fflags, FSR_RD_SHIFT); csrmap[CSR_SEED] = std::make_shared<seed_csr_t>(proc, CSR_SEED); |