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| author | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-04-13 15:22:41 +0800 |
|---|---|---|
| committer | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-04-14 09:40:17 +0800 |
| commit | 750f008e723bb3b20cec41a47ed5cec549447665 (patch) | |
| tree | b2f2bc14c74ea90073803517579465c7c7f368a2 /riscv/processor.cc | |
| parent | c3c04a8be2c641de2b198b90df6c1538eb204120 (diff) | |
| download | spike-750f008e723bb3b20cec41a47ed5cec549447665.zip spike-750f008e723bb3b20cec41a47ed5cec549447665.tar.gz spike-750f008e723bb3b20cec41a47ed5cec549447665.tar.bz2 | |
add support for overlap instructions
* add DECLARE_OVERLAP_INSN to bind instructions with extension
* add overlap_list.h to contain the declare of all overlapping instructions
* make func function for overlapping instruction return NULL when the coresponding
extension(s) is not supported.
Diffstat (limited to 'riscv/processor.cc')
| -rw-r--r-- | riscv/processor.cc | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index f2b0ab3..ad9944e 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -942,16 +942,23 @@ void processor_t::register_extension(extension_t* x) void processor_t::register_base_instructions() { #define DECLARE_INSN(name, match, mask) \ - insn_bits_t name##_match = (match), name##_mask = (mask); + insn_bits_t name##_match = (match), name##_mask = (mask); \ + bool name##_supported = true; + #include "encoding.h" #undef DECLARE_INSN + #define DECLARE_OVERLAP_INSN(name, ext) { name##_supported &= isa->extension_enabled(ext); } + #include "overlap_list.h" + #undef DECLARE_OVERLAP_INSN + #define DEFINE_INSN(name) \ extern reg_t rv32i_##name(processor_t*, insn_t, reg_t); \ extern reg_t rv64i_##name(processor_t*, insn_t, reg_t); \ extern reg_t rv32e_##name(processor_t*, insn_t, reg_t); \ extern reg_t rv64e_##name(processor_t*, insn_t, reg_t); \ register_insn((insn_desc_t) { \ + name##_supported, \ name##_match, \ name##_mask, \ rv32i_##name, \ |