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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-03-29 18:35:25 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-03-29 18:35:25 -0700 |
| commit | b189b9b128ce619f9423009062a85ccb17b32db9 (patch) | |
| tree | 519ee4bd22ea039d28690294461a02b2ce66635f /riscv/processor.cc | |
| parent | 983a062e287ebe0d69c17448e67da6223cf48080 (diff) | |
| download | spike-b189b9b128ce619f9423009062a85ccb17b32db9.zip spike-b189b9b128ce619f9423009062a85ccb17b32db9.tar.gz spike-b189b9b128ce619f9423009062a85ccb17b32db9.tar.bz2 | |
add load-reserved/store-conditional instructions
Diffstat (limited to 'riscv/processor.cc')
| -rw-r--r-- | riscv/processor.cc | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index ba65a93..39a9ec0 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -225,9 +225,6 @@ void processor_t::set_pcr(int which, reg_t val) #endif sr &= ~SR_ZERO; mmu.set_sr(sr); - mmu.flush_tlb(); - // set the fixed-point register length - xprlen = ((sr & SR_S) ? (sr & SR_S64) : (sr & SR_U64)) ? 64 : 32; break; case PCR_EPC: epc = val; |