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| author | Tim Newsome <tim@sifive.com> | 2019-07-16 13:29:45 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-07-16 13:29:45 -0700 |
| commit | 3f200ac315c53d8caae1e454c19b655e6b35048b (patch) | |
| tree | 4b65fa7d0d1cefe9e41416e6864c04ca1607ae4a /riscv/opcodes.h | |
| parent | b1bde2b904cd681c902d7c42c34bc55b4f4922ac (diff) | |
| download | spike-3f200ac315c53d8caae1e454c19b655e6b35048b.zip spike-3f200ac315c53d8caae1e454c19b655e6b35048b.tar.gz spike-3f200ac315c53d8caae1e454c19b655e6b35048b.tar.bz2 | |
Writing non-existent CSRs, access FPRs with mstatus.FS=0 (#311)
* Don't corrupt s0 when abstract CSR write fails.
* Support abstract FPR access then mstatus.FS=0
Discussion on the spec list leans towards this being a requirement.
Certainly users want their debugger to be able to access all registers
regardless of target state.
Diffstat (limited to 'riscv/opcodes.h')
| -rw-r--r-- | riscv/opcodes.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/riscv/opcodes.h b/riscv/opcodes.h index 34c089e..065934a 100644 --- a/riscv/opcodes.h +++ b/riscv/opcodes.h @@ -125,6 +125,11 @@ static uint32_t csrr(unsigned int rd, unsigned int csr) { return (csr << 20) | (rd << 7) | MATCH_CSRRS; } +static uint32_t csrrs(unsigned int rd, unsigned int rs1, unsigned int csr) __attribute__ ((unused)); +static uint32_t csrrs(unsigned int rd, unsigned int rs1, unsigned int csr) { + return (csr << 20) | (rs1 << 15) | (rd << 7) | MATCH_CSRRS; +} + static uint32_t fsw(unsigned int src, unsigned int base, uint16_t offset) __attribute__ ((unused)); static uint32_t fsw(unsigned int src, unsigned int base, uint16_t offset) { @@ -177,7 +182,6 @@ static uint32_t fence_i(void) return MATCH_FENCE_I; } -/* static uint32_t lui(unsigned int dest, uint32_t imm) __attribute__ ((unused)); static uint32_t lui(unsigned int dest, uint32_t imm) { @@ -186,6 +190,7 @@ static uint32_t lui(unsigned int dest, uint32_t imm) MATCH_LUI; } +/* static uint32_t csrci(unsigned int csr, uint16_t imm) __attribute__ ((unused)); static uint32_t csrci(unsigned int csr, uint16_t imm) { return (csr << 20) | |