From 3f200ac315c53d8caae1e454c19b655e6b35048b Mon Sep 17 00:00:00 2001 From: Tim Newsome Date: Tue, 16 Jul 2019 13:29:45 -0700 Subject: Writing non-existent CSRs, access FPRs with mstatus.FS=0 (#311) * Don't corrupt s0 when abstract CSR write fails. * Support abstract FPR access then mstatus.FS=0 Discussion on the spec list leans towards this being a requirement. Certainly users want their debugger to be able to access all registers regardless of target state. --- riscv/opcodes.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'riscv/opcodes.h') diff --git a/riscv/opcodes.h b/riscv/opcodes.h index 34c089e..065934a 100644 --- a/riscv/opcodes.h +++ b/riscv/opcodes.h @@ -125,6 +125,11 @@ static uint32_t csrr(unsigned int rd, unsigned int csr) { return (csr << 20) | (rd << 7) | MATCH_CSRRS; } +static uint32_t csrrs(unsigned int rd, unsigned int rs1, unsigned int csr) __attribute__ ((unused)); +static uint32_t csrrs(unsigned int rd, unsigned int rs1, unsigned int csr) { + return (csr << 20) | (rs1 << 15) | (rd << 7) | MATCH_CSRRS; +} + static uint32_t fsw(unsigned int src, unsigned int base, uint16_t offset) __attribute__ ((unused)); static uint32_t fsw(unsigned int src, unsigned int base, uint16_t offset) { @@ -177,7 +182,6 @@ static uint32_t fence_i(void) return MATCH_FENCE_I; } -/* static uint32_t lui(unsigned int dest, uint32_t imm) __attribute__ ((unused)); static uint32_t lui(unsigned int dest, uint32_t imm) { @@ -186,6 +190,7 @@ static uint32_t lui(unsigned int dest, uint32_t imm) MATCH_LUI; } +/* static uint32_t csrci(unsigned int csr, uint16_t imm) __attribute__ ((unused)); static uint32_t csrci(unsigned int csr, uint16_t imm) { return (csr << 20) | -- cgit v1.1