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authorSuHsien Ho <su-hsien.ho@mediatek.com>2023-10-04 15:00:49 +0800
committerSuHsien Ho <su-hsien.ho@mediatek.com>2024-04-18 13:05:28 +0800
commit9ba5bd3171e97560bc28fe555ff7b8404272a3bb (patch)
treec0ac867c7df2ce90c83071e93c0ea5f0c6745d70 /riscv/mmu.h
parent3192ee4d31f481e84281a24d55bb6130e3743668 (diff)
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Add Zicfiss extension from CFI extension, v0.4.0
1. Add EXT_ZICFISS for enable Zicfiss with zicfiss extension name. 2. Add new software exception with tval 3 for shadow stack. 3. Implement sspush_x1/sspush_x5/sspopchk_x1/sspopchk_x5/ssrdp/ssamoswap_w/ssamoswap_d. 4. Implement c_sspush_x1/c_sspopchk_x5 in c_lui.h which has same encoding. 5. Add new special access type ss_access in xlate_flags_t for checking special read/write permission in SS(Shadow Stack) page. 6. Add new ss_load/ss_store/ssamoswap to enable ss_access flag. 7. Check special pte(xwr=010) of SS page.
Diffstat (limited to 'riscv/mmu.h')
-rw-r--r--riscv/mmu.h32
1 files changed, 31 insertions, 1 deletions
diff --git a/riscv/mmu.h b/riscv/mmu.h
index 4404e4c..b218bf6 100644
--- a/riscv/mmu.h
+++ b/riscv/mmu.h
@@ -42,9 +42,10 @@ struct xlate_flags_t {
const bool forced_virt : 1 {false};
const bool hlvx : 1 {false};
const bool lr : 1 {false};
+ const bool ss_access : 1 {false};
bool is_special_access() const {
- return forced_virt || hlvx || lr;
+ return forced_virt || hlvx || lr || ss_access;
}
};
@@ -127,6 +128,14 @@ public:
return load<T>(addr, {.forced_virt=true, .hlvx=true});
}
+ // shadow stack load
+ template<typename T>
+ T ss_load(reg_t addr) {
+ if ((addr & (sizeof(T) - 1)) != 0)
+ throw trap_store_access_fault((proc) ? proc->state.v : false, addr, 0, 0);
+ return load<T>(addr, {.forced_virt=false, .hlvx=false, .lr=false, .ss_access=true});
+ }
+
template<typename T>
void ALWAYS_INLINE store(reg_t addr, T val, xlate_flags_t xlate_flags = {}) {
reg_t vpn = addr >> PGSHIFT;
@@ -149,6 +158,14 @@ public:
store(addr, val, {.forced_virt=true});
}
+ // shadow stack store
+ template<typename T>
+ void ss_store(reg_t addr, T val) {
+ if ((addr & (sizeof(T) - 1)) != 0)
+ throw trap_store_access_fault((proc) ? proc->state.v : false, addr, 0, 0);
+ store<T>(addr, val, {.forced_virt=false, .hlvx=false, .lr=false, .ss_access=true});
+ }
+
// AMO/Zicbom faults should be reported as store faults
#define convert_load_traps_to_store_traps(BODY) \
try { \
@@ -175,6 +192,19 @@ public:
})
}
+ // for shadow stack amoswap
+ template<typename T>
+ T ssamoswap(reg_t addr, reg_t value) {
+ bool forced_virt = false;
+ bool hlvx = false;
+ bool lr = false;
+ bool ss_access = true;
+ store_slow_path(addr, sizeof(T), nullptr, {forced_virt, hlvx, lr, ss_access}, false, true);
+ auto data = load<T>(addr, {forced_virt, hlvx, lr, ss_access});
+ store<T>(addr, value, {forced_virt, hlvx, lr, ss_access});
+ return data;
+ }
+
template<typename T>
T amo_compare_and_swap(reg_t addr, T comp, T swap) {
convert_load_traps_to_store_traps({