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| author | Andy Wright <acwright@mit.edu> | 2018-05-31 13:53:12 -0400 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2018-05-31 10:53:12 -0700 |
| commit | abc7911a7c7929fa49b71cd37a75bd45e3f75d87 (patch) | |
| tree | f4b65db4f03545a10815ec021a39b8aee64f8ffc /riscv/mmu.cc | |
| parent | bae2161ffb268389bca048b4dd358a0eec398703 (diff) | |
| download | spike-abc7911a7c7929fa49b71cd37a75bd45e3f75d87.zip spike-abc7911a7c7929fa49b71cd37a75bd45e3f75d87.tar.gz spike-abc7911a7c7929fa49b71cd37a75bd45e3f75d87.tar.bz2 | |
Put simif_t declaration in its own file. (#209)
By separating the simif_t declaration from the sim_t declaration, the
simif_t declaration no longer depends on fesvr header files. This
simplifies compilation of custom sim class implementations that don't
depend on fesvr.
Diffstat (limited to 'riscv/mmu.cc')
| -rw-r--r-- | riscv/mmu.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/mmu.cc b/riscv/mmu.cc index e954e5a..3a0bd39 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -1,7 +1,7 @@ // See LICENSE for license details. #include "mmu.h" -#include "sim.h" +#include "simif.h" #include "processor.h" mmu_t::mmu_t(simif_t* sim, processor_t* proc) |