update all instruction templates and part of the implementations

248 files changed, 737 insertions, 150 deletions

diff --git a/riscv/insns/vaadd_vi.h b/riscv/insns/vaadd_vi.h
new file mode 100644
index 0000000..ddd39ea
--- /dev/null
+++ b/riscv/insns/vaadd_vi.h
@@ -0,0 +1,5 @@
+// vaadd
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vaadd_vv.h b/riscv/insns/vaadd_vv.h
index b650add..3ffab32 100644
--- a/riscv/insns/vaadd_vv.h
+++ b/riscv/insns/vaadd_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vaadd
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vaadd_vx.h b/riscv/insns/vaadd_vx.h
new file mode 100644
index 0000000..f8b313c
--- /dev/null
+++ b/riscv/insns/vaadd_vx.h
@@ -0,0 +1,5 @@
+// vaadd
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vadc_vi.h b/riscv/insns/vadc_vi.h
new file mode 100644
index 0000000..2c2d776
--- /dev/null
+++ b/riscv/insns/vadc_vi.h
@@ -0,0 +1,5 @@
+// vadc
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vadc_vv.h b/riscv/insns/vadc_vv.h
index b650add..e448302 100644
--- a/riscv/insns/vadc_vv.h
+++ b/riscv/insns/vadc_vv.h
@@ -1,5 +1,10 @@
- // COMMENT HERE
+//  vd[i] = vs1[i] + vs2[i] + v0[i].LSB
+//  v0[i] = carry(vs1[i] + vs2[i] + v0[i].LSB)
 VI_VV_LOOP
 ({
-    // NOT IMPLEMENTED YET
+    uint64_t &v0 = STATE.VU.elt<uint64_t>(0, i); 
+    int64_t sum = sext_xlen(vs1 + vs2);
+    vd = sext_xlen(sum + (v0&1));
+    if (sum > (1 << STATE.VU.vsew))
+        v0 |= 1; 
 })
diff --git a/riscv/insns/vadc_vx.h b/riscv/insns/vadc_vx.h
new file mode 100644
index 0000000..e1a6b60
--- /dev/null
+++ b/riscv/insns/vadc_vx.h
@@ -0,0 +1,5 @@
+// vadc
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vasub_vv.h b/riscv/insns/vasub_vv.h
index b650add..cc1ba6d 100644
--- a/riscv/insns/vasub_vv.h
+++ b/riscv/insns/vasub_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vasub
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vasub_vx.h b/riscv/insns/vasub_vx.h
new file mode 100644
index 0000000..dd88725
--- /dev/null
+++ b/riscv/insns/vasub_vx.h
@@ -0,0 +1,5 @@
+// vasub
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vcompress_vm.h b/riscv/insns/vcompress_vm.h
index b650add..7653e07 100644
--- a/riscv/insns/vcompress_vm.h
+++ b/riscv/insns/vcompress_vm.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vcompress
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vdiv_vv.h b/riscv/insns/vdiv_vv.h
index b650add..24a4f28 100644
--- a/riscv/insns/vdiv_vv.h
+++ b/riscv/insns/vdiv_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vdiv
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vdiv_vx.h b/riscv/insns/vdiv_vx.h
new file mode 100644
index 0000000..aef1f42
--- /dev/null
+++ b/riscv/insns/vdiv_vx.h
@@ -0,0 +1,5 @@
+// vdiv
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vdivu_vv.h b/riscv/insns/vdivu_vv.h
index b650add..115cf9e 100644
--- a/riscv/insns/vdivu_vv.h
+++ b/riscv/insns/vdivu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vdivu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vdivu_vx.h b/riscv/insns/vdivu_vx.h
new file mode 100644
index 0000000..a0daacf
--- /dev/null
+++ b/riscv/insns/vdivu_vx.h
@@ -0,0 +1,5 @@
+// vdivu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vdot_vv.h b/riscv/insns/vdot_vv.h
index b650add..9948099 100644
--- a/riscv/insns/vdot_vv.h
+++ b/riscv/insns/vdot_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vdot
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vdotu_vv.h b/riscv/insns/vdotu_vv.h
index b650add..7daf9bf 100644
--- a/riscv/insns/vdotu_vv.h
+++ b/riscv/insns/vdotu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vdotu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vext_x_v.h b/riscv/insns/vext_x_v.h
index b650add..a7a4494 100644
--- a/riscv/insns/vext_x_v.h
+++ b/riscv/insns/vext_x_v.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vext_x_v
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vext_x_v_vv.h b/riscv/insns/vext_x_v_vv.h
new file mode 100644
index 0000000..a7a4494
--- /dev/null
+++ b/riscv/insns/vext_x_v_vv.h
@@ -0,0 +1,5 @@
+// vext_x_v
+VI_VV_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfadd_vf.h b/riscv/insns/vfadd_vf.h
new file mode 100644
index 0000000..a9f5e88
--- /dev/null
+++ b/riscv/insns/vfadd_vf.h
@@ -0,0 +1,5 @@
+// vfadd
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfadd_vv.h b/riscv/insns/vfadd_vv.h
index 9e8d391..afe1034 100644
--- a/riscv/insns/vfadd_vv.h
+++ b/riscv/insns/vfadd_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfadd
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfdiv_vf.h b/riscv/insns/vfdiv_vf.h
new file mode 100644
index 0000000..57bb723
--- /dev/null
+++ b/riscv/insns/vfdiv_vf.h
@@ -0,0 +1,5 @@
+// vfdiv
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfdiv_vv.h b/riscv/insns/vfdiv_vv.h
index 9e8d391..2098d22 100644
--- a/riscv/insns/vfdiv_vv.h
+++ b/riscv/insns/vfdiv_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfdiv
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfdot_vv.h b/riscv/insns/vfdot_vv.h
index 9e8d391..bcb2f7b 100644
--- a/riscv/insns/vfdot_vv.h
+++ b/riscv/insns/vfdot_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfdot
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfeq_vf.h b/riscv/insns/vfeq_vf.h
new file mode 100644
index 0000000..d53dc92
--- /dev/null
+++ b/riscv/insns/vfeq_vf.h
@@ -0,0 +1,5 @@
+// vfeq
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfeq_vv.h b/riscv/insns/vfeq_vv.h
index 9e8d391..6e5fc93 100644
--- a/riscv/insns/vfeq_vv.h
+++ b/riscv/insns/vfeq_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfeq
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfge_vf.h b/riscv/insns/vfge_vf.h
index f210b33..89e4579 100644
--- a/riscv/insns/vfge_vf.h
+++ b/riscv/insns/vfge_vf.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfge
 VFP_VF_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfgt_vf.h b/riscv/insns/vfgt_vf.h
index f210b33..2827d68 100644
--- a/riscv/insns/vfgt_vf.h
+++ b/riscv/insns/vfgt_vf.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfgt
 VFP_VF_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfle_vf.h b/riscv/insns/vfle_vf.h
new file mode 100644
index 0000000..4a24f23
--- /dev/null
+++ b/riscv/insns/vfle_vf.h
@@ -0,0 +1,5 @@
+// vfle
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfle_vv.h b/riscv/insns/vfle_vv.h
index 9e8d391..9a3d20b 100644
--- a/riscv/insns/vfle_vv.h
+++ b/riscv/insns/vfle_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfle
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vflt_vf.h b/riscv/insns/vflt_vf.h
new file mode 100644
index 0000000..68c5011
--- /dev/null
+++ b/riscv/insns/vflt_vf.h
@@ -0,0 +1,5 @@
+// vflt
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vflt_vv.h b/riscv/insns/vflt_vv.h
index 9e8d391..6e09ede 100644
--- a/riscv/insns/vflt_vv.h
+++ b/riscv/insns/vflt_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vflt
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfmadd_vf.h b/riscv/insns/vfmadd_vf.h
new file mode 100644
index 0000000..72a22f0
--- /dev/null
+++ b/riscv/insns/vfmadd_vf.h
@@ -0,0 +1,5 @@
+// vfmadd
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfmadd_vv.h b/riscv/insns/vfmadd_vv.h
index 9e8d391..178f473 100644
--- a/riscv/insns/vfmadd_vv.h
+++ b/riscv/insns/vfmadd_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfmadd
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfmax_vf.h b/riscv/insns/vfmax_vf.h
new file mode 100644
index 0000000..635a5b0
--- /dev/null
+++ b/riscv/insns/vfmax_vf.h
@@ -0,0 +1,5 @@
+// vfmax
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfmax_vv.h b/riscv/insns/vfmax_vv.h
index 9e8d391..e192228 100644
--- a/riscv/insns/vfmax_vv.h
+++ b/riscv/insns/vfmax_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfmax
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfmerge_vf.h b/riscv/insns/vfmerge_vf.h
index f210b33..7d13a2d 100644
--- a/riscv/insns/vfmerge_vf.h
+++ b/riscv/insns/vfmerge_vf.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfmerge_vf
 VFP_VF_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfmin_vf.h b/riscv/insns/vfmin_vf.h
new file mode 100644
index 0000000..605eeb7
--- /dev/null
+++ b/riscv/insns/vfmin_vf.h
@@ -0,0 +1,5 @@
+// vfmin
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfmin_vv.h b/riscv/insns/vfmin_vv.h
index 9e8d391..46b20eb 100644
--- a/riscv/insns/vfmin_vv.h
+++ b/riscv/insns/vfmin_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfmin
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfmsac_vf.h b/riscv/insns/vfmsac_vf.h
new file mode 100644
index 0000000..3f8837f
--- /dev/null
+++ b/riscv/insns/vfmsac_vf.h
@@ -0,0 +1,5 @@
+// vfmsac
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfmsac_vv.h b/riscv/insns/vfmsac_vv.h
index 9e8d391..c8ad127 100644
--- a/riscv/insns/vfmsac_vv.h
+++ b/riscv/insns/vfmsac_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfmsac
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfmsub_vf.h b/riscv/insns/vfmsub_vf.h
new file mode 100644
index 0000000..f9e8771
--- /dev/null
+++ b/riscv/insns/vfmsub_vf.h
@@ -0,0 +1,5 @@
+// vfmsub
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfmsub_vv.h b/riscv/insns/vfmsub_vv.h
index 9e8d391..3048e19 100644
--- a/riscv/insns/vfmsub_vv.h
+++ b/riscv/insns/vfmsub_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfmsub
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfmul_vf.h b/riscv/insns/vfmul_vf.h
new file mode 100644
index 0000000..54517e7
--- /dev/null
+++ b/riscv/insns/vfmul_vf.h
@@ -0,0 +1,5 @@
+// vfmul
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfmv_f_s.h b/riscv/insns/vfmv_f_s.h
index 9e8d391..48b00d8 100644
--- a/riscv/insns/vfmv_f_s.h
+++ b/riscv/insns/vfmv_f_s.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfmv_f_s
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfmv_f_s_vv.h b/riscv/insns/vfmv_f_s_vv.h
new file mode 100644
index 0000000..48b00d8
--- /dev/null
+++ b/riscv/insns/vfmv_f_s_vv.h
@@ -0,0 +1,5 @@
+// vfmv_f_s
+VFP_VV_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfmv_s_f.h b/riscv/insns/vfmv_s_f.h
index f210b33..3a678e5 100644
--- a/riscv/insns/vfmv_s_f.h
+++ b/riscv/insns/vfmv_s_f.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfmv_s_f
 VFP_VF_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfne_vf.h b/riscv/insns/vfne_vf.h
new file mode 100644
index 0000000..fe1d890
--- /dev/null
+++ b/riscv/insns/vfne_vf.h
@@ -0,0 +1,5 @@
+// vfne
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfne_vv.h b/riscv/insns/vfne_vv.h
index 9e8d391..24b5294 100644
--- a/riscv/insns/vfne_vv.h
+++ b/riscv/insns/vfne_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfne
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfnmacc_vf.h b/riscv/insns/vfnmacc_vf.h
new file mode 100644
index 0000000..bb12288
--- /dev/null
+++ b/riscv/insns/vfnmacc_vf.h
@@ -0,0 +1,5 @@
+// vfnmacc
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfnmacc_vv.h b/riscv/insns/vfnmacc_vv.h
index 9e8d391..5a5d021 100644
--- a/riscv/insns/vfnmacc_vv.h
+++ b/riscv/insns/vfnmacc_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfnmacc
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfnmadd_vf.h b/riscv/insns/vfnmadd_vf.h
new file mode 100644
index 0000000..14c6ff2
--- /dev/null
+++ b/riscv/insns/vfnmadd_vf.h
@@ -0,0 +1,5 @@
+// vfnmadd
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfnmadd_vv.h b/riscv/insns/vfnmadd_vv.h
index 9e8d391..769f546 100644
--- a/riscv/insns/vfnmadd_vv.h
+++ b/riscv/insns/vfnmadd_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfnmadd
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfnmsac_vf.h b/riscv/insns/vfnmsac_vf.h
new file mode 100644
index 0000000..859942a
--- /dev/null
+++ b/riscv/insns/vfnmsac_vf.h
@@ -0,0 +1,5 @@
+// vfnmsac
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfnmsub_vf.h b/riscv/insns/vfnmsub_vf.h
new file mode 100644
index 0000000..fc1a672
--- /dev/null
+++ b/riscv/insns/vfnmsub_vf.h
@@ -0,0 +1,5 @@
+// vfnmsub
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfnmsub_vv.h b/riscv/insns/vfnmsub_vv.h
index 9e8d391..3d595b7 100644
--- a/riscv/insns/vfnmsub_vv.h
+++ b/riscv/insns/vfnmsub_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfnmsub
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vford_vf.h b/riscv/insns/vford_vf.h
new file mode 100644
index 0000000..a138998
--- /dev/null
+++ b/riscv/insns/vford_vf.h
@@ -0,0 +1,5 @@
+// vford
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vford_vv.h b/riscv/insns/vford_vv.h
index 9e8d391..df582c0 100644
--- a/riscv/insns/vford_vv.h
+++ b/riscv/insns/vford_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vford
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfredmax_vs.h b/riscv/insns/vfredmax_vs.h
index 9e8d391..d8c3244 100644
--- a/riscv/insns/vfredmax_vs.h
+++ b/riscv/insns/vfredmax_vs.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfredmax
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfredmin_vs.h b/riscv/insns/vfredmin_vs.h
index 9e8d391..08f05ff 100644
--- a/riscv/insns/vfredmin_vs.h
+++ b/riscv/insns/vfredmin_vs.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfredmin
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfredosum_vs.h b/riscv/insns/vfredosum_vs.h
index 9e8d391..1257c85 100644
--- a/riscv/insns/vfredosum_vs.h
+++ b/riscv/insns/vfredosum_vs.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfredosum
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfredsum_vs.h b/riscv/insns/vfredsum_vs.h
index 9e8d391..0998b60 100644
--- a/riscv/insns/vfredsum_vs.h
+++ b/riscv/insns/vfredsum_vs.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfredsum
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfsgnj_vf.h b/riscv/insns/vfsgnj_vf.h
new file mode 100644
index 0000000..f6a6c72
--- /dev/null
+++ b/riscv/insns/vfsgnj_vf.h
@@ -0,0 +1,5 @@
+// vfsgnj
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfsgnj_vv.h b/riscv/insns/vfsgnj_vv.h
index 9e8d391..178b43a 100644
--- a/riscv/insns/vfsgnj_vv.h
+++ b/riscv/insns/vfsgnj_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfsgnj
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfsgnn_vf.h b/riscv/insns/vfsgnn_vf.h
new file mode 100644
index 0000000..0199473
--- /dev/null
+++ b/riscv/insns/vfsgnn_vf.h
@@ -0,0 +1,5 @@
+// vfsgnn
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfsgnn_vv.h b/riscv/insns/vfsgnn_vv.h
index 9e8d391..2ea1880 100644
--- a/riscv/insns/vfsgnn_vv.h
+++ b/riscv/insns/vfsgnn_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfsgnn
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfsgnx_vf.h b/riscv/insns/vfsgnx_vf.h
new file mode 100644
index 0000000..485d6ce
--- /dev/null
+++ b/riscv/insns/vfsgnx_vf.h
@@ -0,0 +1,5 @@
+// vfsgnx
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfsgnx_vv.h b/riscv/insns/vfsgnx_vv.h
index 9e8d391..afd2e30 100644
--- a/riscv/insns/vfsgnx_vv.h
+++ b/riscv/insns/vfsgnx_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfsgnx
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfsub_vf.h b/riscv/insns/vfsub_vf.h
new file mode 100644
index 0000000..ee0a90e
--- /dev/null
+++ b/riscv/insns/vfsub_vf.h
@@ -0,0 +1,5 @@
+// vfsub
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfsub_vv.h b/riscv/insns/vfsub_vv.h
index 9e8d391..a03e347 100644
--- a/riscv/insns/vfsub_vv.h
+++ b/riscv/insns/vfsub_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfsub
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfwadd_vf.h b/riscv/insns/vfwadd_vf.h
new file mode 100644
index 0000000..e3cce10
--- /dev/null
+++ b/riscv/insns/vfwadd_vf.h
@@ -0,0 +1,5 @@
+// vfwadd
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfwadd_vv.h b/riscv/insns/vfwadd_vv.h
index 9e8d391..ab82c41 100644
--- a/riscv/insns/vfwadd_vv.h
+++ b/riscv/insns/vfwadd_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfwadd
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfwadd_wf.h b/riscv/insns/vfwadd_wf.h
new file mode 100644
index 0000000..e3cce10
--- /dev/null
+++ b/riscv/insns/vfwadd_wf.h
@@ -0,0 +1,5 @@
+// vfwadd
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfwadd_wv.h b/riscv/insns/vfwadd_wv.h
index 9e8d391..ab82c41 100644
--- a/riscv/insns/vfwadd_wv.h
+++ b/riscv/insns/vfwadd_wv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfwadd
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfwmacc_vf.h b/riscv/insns/vfwmacc_vf.h
new file mode 100644
index 0000000..0c2b8f4
--- /dev/null
+++ b/riscv/insns/vfwmacc_vf.h
@@ -0,0 +1,5 @@
+// vfwmacc
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfwmacc_vv.h b/riscv/insns/vfwmacc_vv.h
index 9e8d391..2b9503a 100644
--- a/riscv/insns/vfwmacc_vv.h
+++ b/riscv/insns/vfwmacc_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfwmacc
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfwmsac_vf.h b/riscv/insns/vfwmsac_vf.h
new file mode 100644
index 0000000..49d592a
--- /dev/null
+++ b/riscv/insns/vfwmsac_vf.h
@@ -0,0 +1,5 @@
+// vfwmsac
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfwmsac_vv.h b/riscv/insns/vfwmsac_vv.h
index 9e8d391..450f93c 100644
--- a/riscv/insns/vfwmsac_vv.h
+++ b/riscv/insns/vfwmsac_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfwmsac
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfwmul_vf.h b/riscv/insns/vfwmul_vf.h
new file mode 100644
index 0000000..d49a679
--- /dev/null
+++ b/riscv/insns/vfwmul_vf.h
@@ -0,0 +1,5 @@
+// vfwmul
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfwmul_vv.h b/riscv/insns/vfwmul_vv.h
index 9e8d391..caf2ee1 100644
--- a/riscv/insns/vfwmul_vv.h
+++ b/riscv/insns/vfwmul_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfwmul
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfwnmacc_vf.h b/riscv/insns/vfwnmacc_vf.h
new file mode 100644
index 0000000..a238fb1
--- /dev/null
+++ b/riscv/insns/vfwnmacc_vf.h
@@ -0,0 +1,5 @@
+// vfwnmacc
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfwnmacc_vv.h b/riscv/insns/vfwnmacc_vv.h
index 9e8d391..8c2ca81 100644
--- a/riscv/insns/vfwnmacc_vv.h
+++ b/riscv/insns/vfwnmacc_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfwnmacc
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfwnmsac_vf.h b/riscv/insns/vfwnmsac_vf.h
new file mode 100644
index 0000000..8c71848
--- /dev/null
+++ b/riscv/insns/vfwnmsac_vf.h
@@ -0,0 +1,5 @@
+// vfwnmsac
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfwnmsac_vv.h b/riscv/insns/vfwnmsac_vv.h
index 9e8d391..f8fc04a 100644
--- a/riscv/insns/vfwnmsac_vv.h
+++ b/riscv/insns/vfwnmsac_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfwnmsac
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfwredosum_vs.h b/riscv/insns/vfwredosum_vs.h
index 9e8d391..a3cb79a 100644
--- a/riscv/insns/vfwredosum_vs.h
+++ b/riscv/insns/vfwredosum_vs.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfwredosum
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfwredsum_vs.h b/riscv/insns/vfwredsum_vs.h
index 9e8d391..04e88a5 100644
--- a/riscv/insns/vfwredsum_vs.h
+++ b/riscv/insns/vfwredsum_vs.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfwredsum
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfwsub_vf.h b/riscv/insns/vfwsub_vf.h
new file mode 100644
index 0000000..b9e9c58
--- /dev/null
+++ b/riscv/insns/vfwsub_vf.h
@@ -0,0 +1,5 @@
+// vfwsub
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfwsub_vv.h b/riscv/insns/vfwsub_vv.h
index 9e8d391..4a899cd 100644
--- a/riscv/insns/vfwsub_vv.h
+++ b/riscv/insns/vfwsub_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfwsub
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vfwsub_wf.h b/riscv/insns/vfwsub_wf.h
new file mode 100644
index 0000000..b9e9c58
--- /dev/null
+++ b/riscv/insns/vfwsub_wf.h
@@ -0,0 +1,5 @@
+// vfwsub
+VFP_VF_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vfwsub_wv.h b/riscv/insns/vfwsub_wv.h
index 9e8d391..4a899cd 100644
--- a/riscv/insns/vfwsub_wv.h
+++ b/riscv/insns/vfwsub_wv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vfwsub
 VFP_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmacc_vv.h b/riscv/insns/vmacc_vv.h
index b650add..8bce74f 100644
--- a/riscv/insns/vmacc_vv.h
+++ b/riscv/insns/vmacc_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmacc
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmacc_vx.h b/riscv/insns/vmacc_vx.h
new file mode 100644
index 0000000..faa3ea1
--- /dev/null
+++ b/riscv/insns/vmacc_vx.h
@@ -0,0 +1,5 @@
+// vmacc
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vmadd_vv.h b/riscv/insns/vmadd_vv.h
index b650add..0b363cc 100644
--- a/riscv/insns/vmadd_vv.h
+++ b/riscv/insns/vmadd_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmadd
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmadd_vx.h b/riscv/insns/vmadd_vx.h
new file mode 100644
index 0000000..b1e6c85
--- /dev/null
+++ b/riscv/insns/vmadd_vx.h
@@ -0,0 +1,5 @@
+// vmadd
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vmand_mm.h b/riscv/insns/vmand_mm.h
index b650add..e2b73eb 100644
--- a/riscv/insns/vmand_mm.h
+++ b/riscv/insns/vmand_mm.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmand
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmandnot_mm.h b/riscv/insns/vmandnot_mm.h
index b650add..6e720b8 100644
--- a/riscv/insns/vmandnot_mm.h
+++ b/riscv/insns/vmandnot_mm.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmandnot
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmax_vx.h b/riscv/insns/vmax_vx.h
index 6d74224..4f1b542 100644
--- a/riscv/insns/vmax_vx.h
+++ b/riscv/insns/vmax_vx.h
@@ -1,5 +1,5 @@
 // vmax.vx vd, vs2, rs1, vm   # vector-scalar
 VI_VX_LOOP
 ({
-    vd = sext_xlen(std::max(vs1, rs2));
+    vd = sext_xlen(std::max(rs1, vs2));
  })
diff --git a/riscv/insns/vmaxu_vx.h b/riscv/insns/vmaxu_vx.h
index e231f27..957affc 100644
--- a/riscv/insns/vmaxu_vx.h
+++ b/riscv/insns/vmaxu_vx.h
@@ -1,5 +1,5 @@
 // vmaxu.vx vd, vs2, rs1, vm   # vector-scalar
 VI_VX_LOOP
 ({
-    vd = zext_xlen(std::max(vs1, rs2));
+    vd = zext_xlen(std::max(rs1, vs2));
  })
diff --git a/riscv/insns/vmerge_vi.h b/riscv/insns/vmerge_vi.h
new file mode 100644
index 0000000..1e44e7c
--- /dev/null
+++ b/riscv/insns/vmerge_vi.h
@@ -0,0 +1,5 @@
+// vmerge
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vmerge_vx.h b/riscv/insns/vmerge_vx.h
new file mode 100644
index 0000000..ef995e8
--- /dev/null
+++ b/riscv/insns/vmerge_vx.h
@@ -0,0 +1,5 @@
+// vmerge
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vmfirst_m.h b/riscv/insns/vmfirst_m.h
index b650add..6d60aec 100644
--- a/riscv/insns/vmfirst_m.h
+++ b/riscv/insns/vmfirst_m.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmfirst
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmin_vx.h b/riscv/insns/vmin_vx.h
index 626726e..af420f1 100644
--- a/riscv/insns/vmin_vx.h
+++ b/riscv/insns/vmin_vx.h
@@ -1,5 +1,5 @@
 // vminx.vx vd, vs2, rs1, vm   # vector-scalar
 VI_VX_LOOP
 ({
-    vd = sext_xlen(std::min(vs1, rs2));
+    vd = sext_xlen(std::min(rs1, vs2));
  })
diff --git a/riscv/insns/vminu_vx.h b/riscv/insns/vminu_vx.h
index 580149b..7d715ba 100644
--- a/riscv/insns/vminu_vx.h
+++ b/riscv/insns/vminu_vx.h
@@ -1,5 +1,5 @@
 // vminu.vx vd, vs2, rs1, vm   # vector-scalar
 VI_VX_LOOP
 ({
-    vd = zext_xlen(std::min(vs1, rs2));
+    vd = zext_xlen(std::min(rs1, vs2));
  })
diff --git a/riscv/insns/vmnand_mm.h b/riscv/insns/vmnand_mm.h
index b650add..f188a12 100644
--- a/riscv/insns/vmnand_mm.h
+++ b/riscv/insns/vmnand_mm.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmnand
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmnor_mm.h b/riscv/insns/vmnor_mm.h
index b650add..943572b 100644
--- a/riscv/insns/vmnor_mm.h
+++ b/riscv/insns/vmnor_mm.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmnor
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmor_mm.h b/riscv/insns/vmor_mm.h
index b650add..d696c87 100644
--- a/riscv/insns/vmor_mm.h
+++ b/riscv/insns/vmor_mm.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmor
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmornot_mm.h b/riscv/insns/vmornot_mm.h
index b650add..b612728 100644
--- a/riscv/insns/vmornot_mm.h
+++ b/riscv/insns/vmornot_mm.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmornot
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmpopc_m.h b/riscv/insns/vmpopc_m.h
index b650add..9866023 100644
--- a/riscv/insns/vmpopc_m.h
+++ b/riscv/insns/vmpopc_m.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmpopc
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmsac_vv.h b/riscv/insns/vmsac_vv.h
index b650add..7aeea3f 100644
--- a/riscv/insns/vmsac_vv.h
+++ b/riscv/insns/vmsac_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmsac
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmsac_vx.h b/riscv/insns/vmsac_vx.h
new file mode 100644
index 0000000..a8245b9
--- /dev/null
+++ b/riscv/insns/vmsac_vx.h
@@ -0,0 +1,5 @@
+// vmsac
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vmsub_vv.h b/riscv/insns/vmsub_vv.h
index b650add..cce2583 100644
--- a/riscv/insns/vmsub_vv.h
+++ b/riscv/insns/vmsub_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmsub
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmsub_vx.h b/riscv/insns/vmsub_vx.h
new file mode 100644
index 0000000..a66945b
--- /dev/null
+++ b/riscv/insns/vmsub_vx.h
@@ -0,0 +1,5 @@
+// vmsub
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vmul_vv.h b/riscv/insns/vmul_vv.h
index b650add..4d77399 100644
--- a/riscv/insns/vmul_vv.h
+++ b/riscv/insns/vmul_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmul
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmul_vx.h b/riscv/insns/vmul_vx.h
new file mode 100644
index 0000000..05ccb12
--- /dev/null
+++ b/riscv/insns/vmul_vx.h
@@ -0,0 +1,5 @@
+// vmul
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vmulh_vv.h b/riscv/insns/vmulh_vv.h
index b650add..effc388 100644
--- a/riscv/insns/vmulh_vv.h
+++ b/riscv/insns/vmulh_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmulh
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmulh_vx.h b/riscv/insns/vmulh_vx.h
new file mode 100644
index 0000000..2a32de4
--- /dev/null
+++ b/riscv/insns/vmulh_vx.h
@@ -0,0 +1,5 @@
+// vmulh
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vmulhsu_vv.h b/riscv/insns/vmulhsu_vv.h
index b650add..577104b 100644
--- a/riscv/insns/vmulhsu_vv.h
+++ b/riscv/insns/vmulhsu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmulhsu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmulhsu_vx.h b/riscv/insns/vmulhsu_vx.h
new file mode 100644
index 0000000..f45122f
--- /dev/null
+++ b/riscv/insns/vmulhsu_vx.h
@@ -0,0 +1,5 @@
+// vmulhsu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vmulhu_vv.h b/riscv/insns/vmulhu_vv.h
index b650add..e99a993 100644
--- a/riscv/insns/vmulhu_vv.h
+++ b/riscv/insns/vmulhu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmulhu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmulhu_vx.h b/riscv/insns/vmulhu_vx.h
new file mode 100644
index 0000000..dea7b7a
--- /dev/null
+++ b/riscv/insns/vmulhu_vx.h
@@ -0,0 +1,5 @@
+// vmulhu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vmv_s_x.h b/riscv/insns/vmv_s_x.h
index a99f41c..5929841 100644
--- a/riscv/insns/vmv_s_x.h
+++ b/riscv/insns/vmv_s_x.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmv_s_x
 VI_VX_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmv_s_x_vx.h b/riscv/insns/vmv_s_x_vx.h
new file mode 100644
index 0000000..5929841
--- /dev/null
+++ b/riscv/insns/vmv_s_x_vx.h
@@ -0,0 +1,5 @@
+// vmv_s_x
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vmxnor_mm.h b/riscv/insns/vmxnor_mm.h
index b650add..134077a 100644
--- a/riscv/insns/vmxnor_mm.h
+++ b/riscv/insns/vmxnor_mm.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmxnor
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vmxor_mm.h b/riscv/insns/vmxor_mm.h
index b650add..6ea260a 100644
--- a/riscv/insns/vmxor_mm.h
+++ b/riscv/insns/vmxor_mm.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vmxor
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vnclip_vi.h b/riscv/insns/vnclip_vi.h
new file mode 100644
index 0000000..ab337cd
--- /dev/null
+++ b/riscv/insns/vnclip_vi.h
@@ -0,0 +1,5 @@
+// vnclip
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vnclip_vv.h b/riscv/insns/vnclip_vv.h
index b650add..16e1e26 100644
--- a/riscv/insns/vnclip_vv.h
+++ b/riscv/insns/vnclip_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vnclip
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vnclip_vx.h b/riscv/insns/vnclip_vx.h
new file mode 100644
index 0000000..305b303
--- /dev/null
+++ b/riscv/insns/vnclip_vx.h
@@ -0,0 +1,5 @@
+// vnclip
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vnclipu_vi.h b/riscv/insns/vnclipu_vi.h
new file mode 100644
index 0000000..b3b770d
--- /dev/null
+++ b/riscv/insns/vnclipu_vi.h
@@ -0,0 +1,5 @@
+// vnclipu
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vnclipu_vv.h b/riscv/insns/vnclipu_vv.h
index b650add..c9338d6 100644
--- a/riscv/insns/vnclipu_vv.h
+++ b/riscv/insns/vnclipu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vnclipu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vnclipu_vx.h b/riscv/insns/vnclipu_vx.h
new file mode 100644
index 0000000..3937946
--- /dev/null
+++ b/riscv/insns/vnclipu_vx.h
@@ -0,0 +1,5 @@
+// vnclipu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vnsra_vi.h b/riscv/insns/vnsra_vi.h
new file mode 100644
index 0000000..8c57c38
--- /dev/null
+++ b/riscv/insns/vnsra_vi.h
@@ -0,0 +1,5 @@
+// vnsra
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vnsra_vv.h b/riscv/insns/vnsra_vv.h
index b650add..6b761c1 100644
--- a/riscv/insns/vnsra_vv.h
+++ b/riscv/insns/vnsra_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vnsra
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vnsra_vx.h b/riscv/insns/vnsra_vx.h
new file mode 100644
index 0000000..0918dd8
--- /dev/null
+++ b/riscv/insns/vnsra_vx.h
@@ -0,0 +1,5 @@
+// vnsra
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vnsrl_vi.h b/riscv/insns/vnsrl_vi.h
new file mode 100644
index 0000000..85c8886
--- /dev/null
+++ b/riscv/insns/vnsrl_vi.h
@@ -0,0 +1,5 @@
+// vnsrl
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vnsrl_vv.h b/riscv/insns/vnsrl_vv.h
index b650add..122c61b 100644
--- a/riscv/insns/vnsrl_vv.h
+++ b/riscv/insns/vnsrl_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vnsrl
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vnsrl_vx.h b/riscv/insns/vnsrl_vx.h
new file mode 100644
index 0000000..887a101
--- /dev/null
+++ b/riscv/insns/vnsrl_vx.h
@@ -0,0 +1,5 @@
+// vnsrl
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vor_vi.h b/riscv/insns/vor_vi.h
new file mode 100644
index 0000000..68a9cd8
--- /dev/null
+++ b/riscv/insns/vor_vi.h
@@ -0,0 +1,5 @@
+// vor
+VI_VI_LOOP
+({
+    vd = sext_xlen(simm5 | vs2);
+})
diff --git a/riscv/insns/vor_vv.h b/riscv/insns/vor_vv.h
index b650add..7777179 100644
--- a/riscv/insns/vor_vv.h
+++ b/riscv/insns/vor_vv.h
@@ -1,5 +1,5 @@
- // COMMENT HERE
+// vor
 VI_VV_LOOP
 ({
-    // NOT IMPLEMENTED YET
+    vd = sext_xlen(vs1 | vs2);
 })
diff --git a/riscv/insns/vor_vx.h b/riscv/insns/vor_vx.h
new file mode 100644
index 0000000..e96b7b6
--- /dev/null
+++ b/riscv/insns/vor_vx.h
@@ -0,0 +1,5 @@
+// vor
+VI_VX_LOOP
+({
+    vd = sext_xlen(rs1 | vs2);
+})
diff --git a/riscv/insns/vredand_vv.h b/riscv/insns/vredand_vv.h
index b650add..675c831 100644
--- a/riscv/insns/vredand_vv.h
+++ b/riscv/insns/vredand_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vredand
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vredmax_vv.h b/riscv/insns/vredmax_vv.h
index b650add..4f74982 100644
--- a/riscv/insns/vredmax_vv.h
+++ b/riscv/insns/vredmax_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vredmax
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vredmaxu_vv.h b/riscv/insns/vredmaxu_vv.h
index b650add..d98b601 100644
--- a/riscv/insns/vredmaxu_vv.h
+++ b/riscv/insns/vredmaxu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vredmaxu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vredmin_vv.h b/riscv/insns/vredmin_vv.h
index b650add..e05c20a 100644
--- a/riscv/insns/vredmin_vv.h
+++ b/riscv/insns/vredmin_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vredmin
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vredminu_vv.h b/riscv/insns/vredminu_vv.h
index b650add..7985584 100644
--- a/riscv/insns/vredminu_vv.h
+++ b/riscv/insns/vredminu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vredminu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vredor_vv.h b/riscv/insns/vredor_vv.h
index b650add..a93d485 100644
--- a/riscv/insns/vredor_vv.h
+++ b/riscv/insns/vredor_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vredor
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vredsum_vv.h b/riscv/insns/vredsum_vv.h
index b650add..05d4eca 100644
--- a/riscv/insns/vredsum_vv.h
+++ b/riscv/insns/vredsum_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vredsum
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vredxor_vv.h b/riscv/insns/vredxor_vv.h
index b650add..8957747 100644
--- a/riscv/insns/vredxor_vv.h
+++ b/riscv/insns/vredxor_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vredxor
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vrem_vv.h b/riscv/insns/vrem_vv.h
index b650add..ff24746 100644
--- a/riscv/insns/vrem_vv.h
+++ b/riscv/insns/vrem_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vrem
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vrem_vx.h b/riscv/insns/vrem_vx.h
new file mode 100644
index 0000000..2a184f9
--- /dev/null
+++ b/riscv/insns/vrem_vx.h
@@ -0,0 +1,5 @@
+// vrem
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vremu_vv.h b/riscv/insns/vremu_vv.h
index b650add..f9e6ca0 100644
--- a/riscv/insns/vremu_vv.h
+++ b/riscv/insns/vremu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vremu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vremu_vx.h b/riscv/insns/vremu_vx.h
new file mode 100644
index 0000000..64fe3f9
--- /dev/null
+++ b/riscv/insns/vremu_vx.h
@@ -0,0 +1,5 @@
+// vremu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vrgather_vi.h b/riscv/insns/vrgather_vi.h
new file mode 100644
index 0000000..3b239aa
--- /dev/null
+++ b/riscv/insns/vrgather_vi.h
@@ -0,0 +1,5 @@
+// vrgather
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vrgather_vv.h b/riscv/insns/vrgather_vv.h
index b650add..9e23a48 100644
--- a/riscv/insns/vrgather_vv.h
+++ b/riscv/insns/vrgather_vv.h
@@ -1,5 +1,6 @@
- // COMMENT HERE
+// vrgather.vv vd, vs2, vs1, vm # vd[i] = (vs1[i] >= VLMAX) ? 0 : vs2[vs1[i]];
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
+
 })
diff --git a/riscv/insns/vrgather_vx.h b/riscv/insns/vrgather_vx.h
new file mode 100644
index 0000000..f2cebe6
--- /dev/null
+++ b/riscv/insns/vrgather_vx.h
@@ -0,0 +1,5 @@
+// vrgather
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vsadd_vi.h b/riscv/insns/vsadd_vi.h
new file mode 100644
index 0000000..05f73c0
--- /dev/null
+++ b/riscv/insns/vsadd_vi.h
@@ -0,0 +1,5 @@
+// vsadd
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vsadd_vv.h b/riscv/insns/vsadd_vv.h
index b650add..3936e8c 100644
--- a/riscv/insns/vsadd_vv.h
+++ b/riscv/insns/vsadd_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vsadd
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vsadd_vx.h b/riscv/insns/vsadd_vx.h
new file mode 100644
index 0000000..4e534be
--- /dev/null
+++ b/riscv/insns/vsadd_vx.h
@@ -0,0 +1,5 @@
+// vsadd
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vsaddu_vi.h b/riscv/insns/vsaddu_vi.h
new file mode 100644
index 0000000..9bfd46a
--- /dev/null
+++ b/riscv/insns/vsaddu_vi.h
@@ -0,0 +1,5 @@
+// vsaddu
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vsaddu_vv.h b/riscv/insns/vsaddu_vv.h
index b650add..de1fa8c 100644
--- a/riscv/insns/vsaddu_vv.h
+++ b/riscv/insns/vsaddu_vv.h
@@ -1,5 +1,6 @@
- // COMMENT HERE
+// vsaddu: Saturating adds of unsigned integers
 VI_VV_LOOP
 ({
-    // NOT IMPLEMENTED YET
+    //unsigned sum = 
+    // update vxsat
 })
diff --git a/riscv/insns/vsaddu_vx.h b/riscv/insns/vsaddu_vx.h
new file mode 100644
index 0000000..f9d8c3e
--- /dev/null
+++ b/riscv/insns/vsaddu_vx.h
@@ -0,0 +1,5 @@
+// vsaddu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vsbc_vv.h b/riscv/insns/vsbc_vv.h
index b650add..2b08cf2 100644
--- a/riscv/insns/vsbc_vv.h
+++ b/riscv/insns/vsbc_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vsbc
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vsbc_vx.h b/riscv/insns/vsbc_vx.h
new file mode 100644
index 0000000..7fef929
--- /dev/null
+++ b/riscv/insns/vsbc_vx.h
@@ -0,0 +1,5 @@
+// vsbc
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vseq_vi.h b/riscv/insns/vseq_vi.h
new file mode 100644
index 0000000..0514c34
--- /dev/null
+++ b/riscv/insns/vseq_vi.h
@@ -0,0 +1,5 @@
+// vseq
+VI_VI_LOOP
+({
+    WRITE_RD(sreg_t(simm5) == sreg_t(vs2));
+})
diff --git a/riscv/insns/vseq_vv.h b/riscv/insns/vseq_vv.h
index b650add..74073a4 100644
--- a/riscv/insns/vseq_vv.h
+++ b/riscv/insns/vseq_vv.h
@@ -1,5 +1,5 @@
- // COMMENT HERE
+// vseq: Set if equal
 VI_VV_LOOP
 ({
-    // NOT IMPLEMENTED YET
+    WRITE_RD(sreg_t(vs1) == sreg_t(vs2));
 })
diff --git a/riscv/insns/vseq_vx.h b/riscv/insns/vseq_vx.h
new file mode 100644
index 0000000..f516bcd
--- /dev/null
+++ b/riscv/insns/vseq_vx.h
@@ -0,0 +1,5 @@
+// vseq
+VI_VX_LOOP
+({
+    WRITE_RD(sreg_t(rs1) == sreg_t(vs2));
+})
diff --git a/riscv/insns/vsgt_vi.h b/riscv/insns/vsgt_vi.h
new file mode 100644
index 0000000..38ba179
--- /dev/null
+++ b/riscv/insns/vsgt_vi.h
@@ -0,0 +1,5 @@
+// vsgt
+VI_VI_LOOP
+({
+    WRITE_RD(sreg_t(simm5) > sreg_t(vs2));
+})
diff --git a/riscv/insns/vsgt_vx.h b/riscv/insns/vsgt_vx.h
index a99f41c..4f09e9f 100644
--- a/riscv/insns/vsgt_vx.h
+++ b/riscv/insns/vsgt_vx.h
@@ -1,5 +1,5 @@
- // COMMENT HERE
+// vsgt
 VI_VX_LOOP
 ({
-    // NOT IMPLEMENTED YET
+    WRITE_RD(sreg_t(rs1) > sreg_t(vs2));
 })
diff --git a/riscv/insns/vsgtu_vi.h b/riscv/insns/vsgtu_vi.h
new file mode 100644
index 0000000..91c6b97
--- /dev/null
+++ b/riscv/insns/vsgtu_vi.h
@@ -0,0 +1,5 @@
+// vsgtu
+VI_VI_LOOP
+({
+    WRITE_RD(reg_t(simm5) > reg_t(vs2));
+})
diff --git a/riscv/insns/vsgtu_vx.h b/riscv/insns/vsgtu_vx.h
index a99f41c..40671e9 100644
--- a/riscv/insns/vsgtu_vx.h
+++ b/riscv/insns/vsgtu_vx.h
@@ -1,5 +1,5 @@
- // COMMENT HERE
+// vsgtu
 VI_VX_LOOP
 ({
-    // NOT IMPLEMENTED YET
+    WRITE_RD(reg_t(rs1) > reg_t(vs2));
 })
diff --git a/riscv/insns/vsle_vi.h b/riscv/insns/vsle_vi.h
new file mode 100644
index 0000000..8283f75
--- /dev/null
+++ b/riscv/insns/vsle_vi.h
@@ -0,0 +1,5 @@
+// vsle
+VI_VI_LOOP
+({
+    WRITE_RD(sreg_t(simm5) <= sreg_t(vs2));
+})
diff --git a/riscv/insns/vsle_vv.h b/riscv/insns/vsle_vv.h
index b650add..5269724 100644
--- a/riscv/insns/vsle_vv.h
+++ b/riscv/insns/vsle_vv.h
@@ -1,5 +1,5 @@
- // COMMENT HERE
+// vsle: Set if less than or equal, signed
 VI_VV_LOOP
 ({
-    // NOT IMPLEMENTED YET
+    WRITE_RD(sreg_t(vs1) <= sreg_t(vs2));
 })
diff --git a/riscv/insns/vsle_vx.h b/riscv/insns/vsle_vx.h
new file mode 100644
index 0000000..926643f
--- /dev/null
+++ b/riscv/insns/vsle_vx.h
@@ -0,0 +1,5 @@
+// vsle
+VI_VX_LOOP
+({
+    WRITE_RD(sreg_t(rs1) <= sreg_t(vs2));
+})
diff --git a/riscv/insns/vsleu_vi.h b/riscv/insns/vsleu_vi.h
new file mode 100644
index 0000000..c7d5e7f
--- /dev/null
+++ b/riscv/insns/vsleu_vi.h
@@ -0,0 +1,5 @@
+// vsleu
+VI_VI_LOOP
+({
+    WRITE_RD(reg_t(simm5) <= reg_t(vs2));
+})
diff --git a/riscv/insns/vsleu_vv.h b/riscv/insns/vsleu_vv.h
index b650add..6222a61 100644
--- a/riscv/insns/vsleu_vv.h
+++ b/riscv/insns/vsleu_vv.h
@@ -1,5 +1,5 @@
- // COMMENT HERE
+// vsleu: Set if less than or equal, unsigned
 VI_VV_LOOP
 ({
-    // NOT IMPLEMENTED YET
+    WRITE_RD(reg_t(vs1) <= reg_t(vs2));
 })
diff --git a/riscv/insns/vsleu_vx.h b/riscv/insns/vsleu_vx.h
new file mode 100644
index 0000000..ca9d67f
--- /dev/null
+++ b/riscv/insns/vsleu_vx.h
@@ -0,0 +1,5 @@
+// vsleu
+VI_VX_LOOP
+({
+    WRITE_RD(reg_t(rs1) <= reg_t(vs2));
+})
diff --git a/riscv/insns/vslide_vx.h b/riscv/insns/vslide_vx.h
new file mode 100644
index 0000000..ea6e9b5
--- /dev/null
+++ b/riscv/insns/vslide_vx.h
@@ -0,0 +1,5 @@
+// vslide
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vslidedown_vi.h b/riscv/insns/vslidedown_vi.h
new file mode 100644
index 0000000..0bd7218
--- /dev/null
+++ b/riscv/insns/vslidedown_vi.h
@@ -0,0 +1,5 @@
+// vslidedown
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vslidedown_vx.h b/riscv/insns/vslidedown_vx.h
index a99f41c..f7f2c6b 100644
--- a/riscv/insns/vslidedown_vx.h
+++ b/riscv/insns/vslidedown_vx.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vslidedown
 VI_VX_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vslideup_vi.h b/riscv/insns/vslideup_vi.h
new file mode 100644
index 0000000..f837e39
--- /dev/null
+++ b/riscv/insns/vslideup_vi.h
@@ -0,0 +1,5 @@
+// vslideup
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vslideup_vx.h b/riscv/insns/vslideup_vx.h
index a99f41c..72399b8 100644
--- a/riscv/insns/vslideup_vx.h
+++ b/riscv/insns/vslideup_vx.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vslideup
 VI_VX_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vsll_vi.h b/riscv/insns/vsll_vi.h
new file mode 100644
index 0000000..80a83f0
--- /dev/null
+++ b/riscv/insns/vsll_vi.h
@@ -0,0 +1,5 @@
+// vsll
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vsll_vv.h b/riscv/insns/vsll_vv.h
index b650add..8c13a1f 100644
--- a/riscv/insns/vsll_vv.h
+++ b/riscv/insns/vsll_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vsll
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vsll_vx.h b/riscv/insns/vsll_vx.h
new file mode 100644
index 0000000..b31f8f2
--- /dev/null
+++ b/riscv/insns/vsll_vx.h
@@ -0,0 +1,5 @@
+// vsll
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vslt_vv.h b/riscv/insns/vslt_vv.h
index b650add..ae8f68c 100644
--- a/riscv/insns/vslt_vv.h
+++ b/riscv/insns/vslt_vv.h
@@ -1,5 +1,5 @@
- // COMMENT HERE
+// vslt
 VI_VV_LOOP
 ({
-    // NOT IMPLEMENTED YET
+    WRITE_RD(sreg_t(vs1) < sreg_t(vs2));
 })
diff --git a/riscv/insns/vslt_vx.h b/riscv/insns/vslt_vx.h
new file mode 100644
index 0000000..ceafdbd
--- /dev/null
+++ b/riscv/insns/vslt_vx.h
@@ -0,0 +1,5 @@
+// vslt
+VI_VX_LOOP
+({
+    WRITE_RD(sreg_t(rs1) < sreg_t(vs2));
+})
diff --git a/riscv/insns/vsltu_vv.h b/riscv/insns/vsltu_vv.h
index b650add..ecce932 100644
--- a/riscv/insns/vsltu_vv.h
+++ b/riscv/insns/vsltu_vv.h
@@ -1,5 +1,5 @@
- // COMMENT HERE
+// vsltu: Set if less than, unsigned
 VI_VV_LOOP
 ({
-    // NOT IMPLEMENTED YET
+    WRITE_RD(reg_t(vs1) < reg_t(vs2));
 })
diff --git a/riscv/insns/vsltu_vx.h b/riscv/insns/vsltu_vx.h
new file mode 100644
index 0000000..2e6d4c7
--- /dev/null
+++ b/riscv/insns/vsltu_vx.h
@@ -0,0 +1,5 @@
+// vsltu
+VI_VX_LOOP
+({
+    WRITE_RD(reg_t(rs1) < reg_t(vs2));
+})
diff --git a/riscv/insns/vsmul_vv.h b/riscv/insns/vsmul_vv.h
index b650add..2ed6d7c 100644
--- a/riscv/insns/vsmul_vv.h
+++ b/riscv/insns/vsmul_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vsmul
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vsmul_vx.h b/riscv/insns/vsmul_vx.h
new file mode 100644
index 0000000..279526d
--- /dev/null
+++ b/riscv/insns/vsmul_vx.h
@@ -0,0 +1,5 @@
+// vsmul
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vsne_vi.h b/riscv/insns/vsne_vi.h
new file mode 100644
index 0000000..8834778
--- /dev/null
+++ b/riscv/insns/vsne_vi.h
@@ -0,0 +1,5 @@
+// vsne
+VI_VI_LOOP
+({
+    vd = (simm5 != vs2) ? 1 : 0;
+})
diff --git a/riscv/insns/vsne_vv.h b/riscv/insns/vsne_vv.h
index b650add..b86bf57 100644
--- a/riscv/insns/vsne_vv.h
+++ b/riscv/insns/vsne_vv.h
@@ -1,5 +1,5 @@
- // COMMENT HERE
+// vsne
 VI_VV_LOOP
 ({
-    // NOT IMPLEMENTED YET
+    vd = (vs1 != vs2) ? 1 : 0;
 })
diff --git a/riscv/insns/vsne_vx.h b/riscv/insns/vsne_vx.h
new file mode 100644
index 0000000..3ab8c3a
--- /dev/null
+++ b/riscv/insns/vsne_vx.h
@@ -0,0 +1,5 @@
+// vsne
+VI_VX_LOOP
+({
+    vd = (rs1 != vs2) ? 1 : 0;
+})
diff --git a/riscv/insns/vsra_vi.h b/riscv/insns/vsra_vi.h
new file mode 100644
index 0000000..52fabe7
--- /dev/null
+++ b/riscv/insns/vsra_vi.h
@@ -0,0 +1,5 @@
+// vsra
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vsra_vv.h b/riscv/insns/vsra_vv.h
index b650add..3062e02 100644
--- a/riscv/insns/vsra_vv.h
+++ b/riscv/insns/vsra_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vsra
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vsra_vx.h b/riscv/insns/vsra_vx.h
new file mode 100644
index 0000000..07304c1
--- /dev/null
+++ b/riscv/insns/vsra_vx.h
@@ -0,0 +1,5 @@
+// vsra
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vsrl_vi.h b/riscv/insns/vsrl_vi.h
new file mode 100644
index 0000000..b9c224b
--- /dev/null
+++ b/riscv/insns/vsrl_vi.h
@@ -0,0 +1,5 @@
+// vsrl
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vsrl_vv.h b/riscv/insns/vsrl_vv.h
index b650add..a412317 100644
--- a/riscv/insns/vsrl_vv.h
+++ b/riscv/insns/vsrl_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vsrl
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vsrl_vx.h b/riscv/insns/vsrl_vx.h
new file mode 100644
index 0000000..b3717c7
--- /dev/null
+++ b/riscv/insns/vsrl_vx.h
@@ -0,0 +1,5 @@
+// vsrl
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vssra_vi.h b/riscv/insns/vssra_vi.h
new file mode 100644
index 0000000..cac695f
--- /dev/null
+++ b/riscv/insns/vssra_vi.h
@@ -0,0 +1,5 @@
+// vssra
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vssra_vv.h b/riscv/insns/vssra_vv.h
index b650add..c3460b6 100644
--- a/riscv/insns/vssra_vv.h
+++ b/riscv/insns/vssra_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vssra
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vssra_vx.h b/riscv/insns/vssra_vx.h
new file mode 100644
index 0000000..df2832d
--- /dev/null
+++ b/riscv/insns/vssra_vx.h
@@ -0,0 +1,5 @@
+// vssra
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vssrl_vi.h b/riscv/insns/vssrl_vi.h
new file mode 100644
index 0000000..c6f7687
--- /dev/null
+++ b/riscv/insns/vssrl_vi.h
@@ -0,0 +1,5 @@
+// vssrl
+VI_VI_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vssrl_vv.h b/riscv/insns/vssrl_vv.h
index b650add..ac93e19 100644
--- a/riscv/insns/vssrl_vv.h
+++ b/riscv/insns/vssrl_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vssrl
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vssrl_vx.h b/riscv/insns/vssrl_vx.h
new file mode 100644
index 0000000..b4f67bf
--- /dev/null
+++ b/riscv/insns/vssrl_vx.h
@@ -0,0 +1,5 @@
+// vssrl
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vssub_vv.h b/riscv/insns/vssub_vv.h
index b650add..00e4a46 100644
--- a/riscv/insns/vssub_vv.h
+++ b/riscv/insns/vssub_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vssub
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vssub_vx.h b/riscv/insns/vssub_vx.h
new file mode 100644
index 0000000..69463c1
--- /dev/null
+++ b/riscv/insns/vssub_vx.h
@@ -0,0 +1,5 @@
+// vssub
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vssubu_vv.h b/riscv/insns/vssubu_vv.h
index b650add..f8597a2 100644
--- a/riscv/insns/vssubu_vv.h
+++ b/riscv/insns/vssubu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vssubu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vssubu_vx.h b/riscv/insns/vssubu_vx.h
new file mode 100644
index 0000000..739650a
--- /dev/null
+++ b/riscv/insns/vssubu_vx.h
@@ -0,0 +1,5 @@
+// vssubu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vsub_vv.h b/riscv/insns/vsub_vv.h
index 7176b0e..42aa85a 100644
--- a/riscv/insns/vsub_vv.h
+++ b/riscv/insns/vsub_vv.h
@@ -1,5 +1,5 @@
-// vsub.vv vd, vs1, vs2, vm
+// vsub
 VI_VV_LOOP
 ({
-    vd = sext_xlen(vs1 - vs2);
- })
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vsub_vx.h b/riscv/insns/vsub_vx.h
index bc7e8aa..37974d9 100644
--- a/riscv/insns/vsub_vx.h
+++ b/riscv/insns/vsub_vx.h
@@ -1,5 +1,5 @@
-// visub.vx vd, rs1, vs2, vm
+// vsub
 VI_VX_LOOP
 ({
-    vd = sext_xlen(rs2 - vs1);
- })
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwadd_vv.h b/riscv/insns/vwadd_vv.h
index b650add..9f5b5d1 100644
--- a/riscv/insns/vwadd_vv.h
+++ b/riscv/insns/vwadd_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwadd
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwadd_vx.h b/riscv/insns/vwadd_vx.h
new file mode 100644
index 0000000..e331ac8
--- /dev/null
+++ b/riscv/insns/vwadd_vx.h
@@ -0,0 +1,5 @@
+// vwadd
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwadd_wv.h b/riscv/insns/vwadd_wv.h
index b650add..9f5b5d1 100644
--- a/riscv/insns/vwadd_wv.h
+++ b/riscv/insns/vwadd_wv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwadd
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwadd_wx.h b/riscv/insns/vwadd_wx.h
new file mode 100644
index 0000000..e331ac8
--- /dev/null
+++ b/riscv/insns/vwadd_wx.h
@@ -0,0 +1,5 @@
+// vwadd
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwaddu_vv.h b/riscv/insns/vwaddu_vv.h
index b650add..af7d320 100644
--- a/riscv/insns/vwaddu_vv.h
+++ b/riscv/insns/vwaddu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwaddu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwaddu_vx.h b/riscv/insns/vwaddu_vx.h
new file mode 100644
index 0000000..bcd9a70
--- /dev/null
+++ b/riscv/insns/vwaddu_vx.h
@@ -0,0 +1,5 @@
+// vwaddu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwaddu_wv.h b/riscv/insns/vwaddu_wv.h
index b650add..af7d320 100644
--- a/riscv/insns/vwaddu_wv.h
+++ b/riscv/insns/vwaddu_wv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwaddu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwaddu_wx.h b/riscv/insns/vwaddu_wx.h
new file mode 100644
index 0000000..bcd9a70
--- /dev/null
+++ b/riscv/insns/vwaddu_wx.h
@@ -0,0 +1,5 @@
+// vwaddu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwmacc_vv.h b/riscv/insns/vwmacc_vv.h
index b650add..fdbdc40 100644
--- a/riscv/insns/vwmacc_vv.h
+++ b/riscv/insns/vwmacc_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwmacc
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwmacc_vx.h b/riscv/insns/vwmacc_vx.h
new file mode 100644
index 0000000..321e6c6
--- /dev/null
+++ b/riscv/insns/vwmacc_vx.h
@@ -0,0 +1,5 @@
+// vwmacc
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwmaccu_vv.h b/riscv/insns/vwmaccu_vv.h
index b650add..5127b01 100644
--- a/riscv/insns/vwmaccu_vv.h
+++ b/riscv/insns/vwmaccu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwmaccu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwmaccu_vx.h b/riscv/insns/vwmaccu_vx.h
new file mode 100644
index 0000000..732a6ca
--- /dev/null
+++ b/riscv/insns/vwmaccu_vx.h
@@ -0,0 +1,5 @@
+// vwmaccu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwmsac_vx.h b/riscv/insns/vwmsac_vx.h
index b650add..04d5ac8 100644
--- a/riscv/insns/vwmsac_vx.h
+++ b/riscv/insns/vwmsac_vx.h
@@ -1,5 +1,5 @@
- // COMMENT HERE
-VI_VV_LOOP
+// vwmsac
+VI_VX_LOOP
 ({
     // NOT IMPLEMENTED YET
 })
diff --git a/riscv/insns/vwmsacu_vx.h b/riscv/insns/vwmsacu_vx.h
index b650add..798ade2 100644
--- a/riscv/insns/vwmsacu_vx.h
+++ b/riscv/insns/vwmsacu_vx.h
@@ -1,5 +1,5 @@
- // COMMENT HERE
-VI_VV_LOOP
+// vwmsacu
+VI_VX_LOOP
 ({
     // NOT IMPLEMENTED YET
 })
diff --git a/riscv/insns/vwmul_vv.h b/riscv/insns/vwmul_vv.h
index b650add..1975c4b 100644
--- a/riscv/insns/vwmul_vv.h
+++ b/riscv/insns/vwmul_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwmul
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwmul_vx.h b/riscv/insns/vwmul_vx.h
new file mode 100644
index 0000000..af03230
--- /dev/null
+++ b/riscv/insns/vwmul_vx.h
@@ -0,0 +1,5 @@
+// vwmul
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwmulsu_vv.h b/riscv/insns/vwmulsu_vv.h
index b650add..2534415 100644
--- a/riscv/insns/vwmulsu_vv.h
+++ b/riscv/insns/vwmulsu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwmulsu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwmulsu_vx.h b/riscv/insns/vwmulsu_vx.h
new file mode 100644
index 0000000..44efa2e
--- /dev/null
+++ b/riscv/insns/vwmulsu_vx.h
@@ -0,0 +1,5 @@
+// vwmulsu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwmulu_vv.h b/riscv/insns/vwmulu_vv.h
index b650add..667317f 100644
--- a/riscv/insns/vwmulu_vv.h
+++ b/riscv/insns/vwmulu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwmulu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwmulu_vx.h b/riscv/insns/vwmulu_vx.h
new file mode 100644
index 0000000..a59369a
--- /dev/null
+++ b/riscv/insns/vwmulu_vx.h
@@ -0,0 +1,5 @@
+// vwmulu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwredsum_vs.h b/riscv/insns/vwredsum_vs.h
new file mode 100644
index 0000000..e4e1b0e
--- /dev/null
+++ b/riscv/insns/vwredsum_vs.h
@@ -0,0 +1,5 @@
+// vwredsum
+VI_VV_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwredsum_vv.h b/riscv/insns/vwredsum_vv.h
index b650add..e4e1b0e 100644
--- a/riscv/insns/vwredsum_vv.h
+++ b/riscv/insns/vwredsum_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwredsum
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwredsumu_vs.h b/riscv/insns/vwredsumu_vs.h
new file mode 100644
index 0000000..83ba774
--- /dev/null
+++ b/riscv/insns/vwredsumu_vs.h
@@ -0,0 +1,5 @@
+// vwredsumu
+VI_VV_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwsmacc_vv.h b/riscv/insns/vwsmacc_vv.h
index b650add..5a6316f 100644
--- a/riscv/insns/vwsmacc_vv.h
+++ b/riscv/insns/vwsmacc_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwsmacc
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwsmacc_vx.h b/riscv/insns/vwsmacc_vx.h
new file mode 100644
index 0000000..71412c8
--- /dev/null
+++ b/riscv/insns/vwsmacc_vx.h
@@ -0,0 +1,5 @@
+// vwsmacc
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwsmaccu_vv.h b/riscv/insns/vwsmaccu_vv.h
index b650add..dbea439 100644
--- a/riscv/insns/vwsmaccu_vv.h
+++ b/riscv/insns/vwsmaccu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwsmaccu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwsmaccu_vx.h b/riscv/insns/vwsmaccu_vx.h
new file mode 100644
index 0000000..e049bcd
--- /dev/null
+++ b/riscv/insns/vwsmaccu_vx.h
@@ -0,0 +1,5 @@
+// vwsmaccu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwsmsac_vv.h b/riscv/insns/vwsmsac_vv.h
index b650add..fb8a7c7 100644
--- a/riscv/insns/vwsmsac_vv.h
+++ b/riscv/insns/vwsmsac_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwsmsac
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwsmsacu_vv.h b/riscv/insns/vwsmsacu_vv.h
index b650add..d8a0bab 100644
--- a/riscv/insns/vwsmsacu_vv.h
+++ b/riscv/insns/vwsmsacu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwsmsacu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwsub_vv.h b/riscv/insns/vwsub_vv.h
index b650add..7a65321 100644
--- a/riscv/insns/vwsub_vv.h
+++ b/riscv/insns/vwsub_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwsub
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwsub_vx.h b/riscv/insns/vwsub_vx.h
new file mode 100644
index 0000000..90bae84
--- /dev/null
+++ b/riscv/insns/vwsub_vx.h
@@ -0,0 +1,5 @@
+// vwsub
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwsub_wv.h b/riscv/insns/vwsub_wv.h
index b650add..7a65321 100644
--- a/riscv/insns/vwsub_wv.h
+++ b/riscv/insns/vwsub_wv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwsub
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwsub_wx.h b/riscv/insns/vwsub_wx.h
new file mode 100644
index 0000000..90bae84
--- /dev/null
+++ b/riscv/insns/vwsub_wx.h
@@ -0,0 +1,5 @@
+// vwsub
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwsubu_vv.h b/riscv/insns/vwsubu_vv.h
index b650add..2c4f450 100644
--- a/riscv/insns/vwsubu_vv.h
+++ b/riscv/insns/vwsubu_vv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwsubu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwsubu_vx.h b/riscv/insns/vwsubu_vx.h
new file mode 100644
index 0000000..5f83455
--- /dev/null
+++ b/riscv/insns/vwsubu_vx.h
@@ -0,0 +1,5 @@
+// vwsubu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vwsubu_wv.h b/riscv/insns/vwsubu_wv.h
index b650add..2c4f450 100644
--- a/riscv/insns/vwsubu_wv.h
+++ b/riscv/insns/vwsubu_wv.h
@@ -1,4 +1,4 @@
- // COMMENT HERE
+// vwsubu
 VI_VV_LOOP
 ({
     // NOT IMPLEMENTED YET
diff --git a/riscv/insns/vwsubu_wx.h b/riscv/insns/vwsubu_wx.h
new file mode 100644
index 0000000..5f83455
--- /dev/null
+++ b/riscv/insns/vwsubu_wx.h
@@ -0,0 +1,5 @@
+// vwsubu
+VI_VX_LOOP
+({
+    // NOT IMPLEMENTED YET
+})
diff --git a/riscv/insns/vxor_vi.h b/riscv/insns/vxor_vi.h
new file mode 100644
index 0000000..b6cffee
--- /dev/null
+++ b/riscv/insns/vxor_vi.h
@@ -0,0 +1,5 @@
+// vxor
+VI_VI_LOOP
+({
+    vd = sext_xlen(simm5 ^ vs2);
+})
diff --git a/riscv/insns/vxor_vv.h b/riscv/insns/vxor_vv.h
index b650add..78f7885 100644
--- a/riscv/insns/vxor_vv.h
+++ b/riscv/insns/vxor_vv.h
@@ -1,5 +1,5 @@
- // COMMENT HERE
+// vxor
 VI_VV_LOOP
 ({
-    // NOT IMPLEMENTED YET
+    vd = sext_xlen(vs1 ^ vs2);
 })
diff --git a/riscv/insns/vxor_vx.h b/riscv/insns/vxor_vx.h
new file mode 100644
index 0000000..b29c0e8
--- /dev/null
+++ b/riscv/insns/vxor_vx.h
@@ -0,0 +1,5 @@
+// vxor
+VI_VX_LOOP
+({
+    vd = sext_xlen(rs1 ^ vs2);
+})