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author | Andrew Waterman <andrew@sifive.com> | 2020-02-17 15:45:06 -0800 |
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committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-02-19 19:57:50 -0800 |
commit | d7e658a9ca8c303d5083b41bc369c09f4dfea810 (patch) | |
tree | e9bd2ee205fbc87f022d0986317dfa8c54ebeba1 /riscv/insns/vmerge_vxm.h | |
parent | bdf9ccfd2cab482e5bab8d005e6061e9dfeb660a (diff) | |
download | spike-d7e658a9ca8c303d5083b41bc369c09f4dfea810.zip spike-d7e658a9ca8c303d5083b41bc369c09f4dfea810.tar.gz spike-d7e658a9ca8c303d5083b41bc369c09f4dfea810.tar.bz2 |
v[f]merge: allow v0 overlap if LMUL = 1
The VI_CHECK_SSS macro enforces the weaker constraint.
Diffstat (limited to 'riscv/insns/vmerge_vxm.h')
-rw-r--r-- | riscv/insns/vmerge_vxm.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/riscv/insns/vmerge_vxm.h b/riscv/insns/vmerge_vxm.h index c0f115c..de7df91 100644 --- a/riscv/insns/vmerge_vxm.h +++ b/riscv/insns/vmerge_vxm.h @@ -1,5 +1,4 @@ // vmerge.vxm vd, vs2, rs1 -require(insn.rd() != 0); VI_CHECK_SSS(false); VI_VVXI_MERGE_LOOP ({ |