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authorDave.Wen <dave.wen@sifive.com>2019-04-28 20:10:10 -0700
committerDave.Wen <dave.wen@sifive.com>2019-04-28 20:10:27 -0700
commit55798da0328a68b82f5ce0ecd193a148f42e415d (patch)
tree49626673c63d00d618ae4278abb13ada548fcef1 /riscv/insns/vfnmacc_vf.h
parent91cb32d9acd8108dc1325d2b063738a3f9be02d8 (diff)
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refactor: remove the redundant code
Diffstat (limited to 'riscv/insns/vfnmacc_vf.h')
-rw-r--r--riscv/insns/vfnmacc_vf.h23
1 files changed, 10 insertions, 13 deletions
diff --git a/riscv/insns/vfnmacc_vf.h b/riscv/insns/vfnmacc_vf.h
index d5672c3..0eddd91 100644
--- a/riscv/insns/vfnmacc_vf.h
+++ b/riscv/insns/vfnmacc_vf.h
@@ -1,19 +1,16 @@
// vfnmacc: vd[i] = -(f[rs1] * vs2[i]) - vd[i]
-require_fp;
-softfloat_roundingMode = STATE.VU.vxrm;
float32_t mul_result;
VFP_VF_LOOP
({
switch(STATE.VU.vsew){
- case e32:
- mul_result = f32_mul(rs1, f32(vs2.v ^ F32_SIGN));
- vd = f32_sub(mul_result, vd);
- break;
- case e16:
- case e8:
- default:
- softfloat_exceptionFlags = 1;
- };
- })
-set_fp_exceptions;
+ case e32:
+ mul_result = f32_mul(rs1, f32(vs2.v ^ F32_SIGN));
+ vd = f32_sub(mul_result, vd);
+ break;
+ case e16:
+ case e8:
+ default:
+ softfloat_exceptionFlags = 1;
+ };
+})