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authorChih-Min Chao <chihmin.chao@sifive.com>2019-04-25 00:06:20 -0700
committerChih-Min Chao <chihmin.chao@sifive.com>2019-04-25 00:06:22 -0700
commit4265438d34183efeccb377cbe5a2a444c7507827 (patch)
tree791c5e5103babaa6daf66a3f2926adeec3888ccd /riscv/insns/vfmsub_vf.h
parent5e4bac49ecf5f3ecc4a48f7bb612b8d3c76b6427 (diff)
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rvv: fix vfm* and vfnm
1. use fuesed mac since the precision is different 2. remove reduncnt rounding mode and legal checking 3. remove last exception generation Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/insns/vfmsub_vf.h')
-rw-r--r--riscv/insns/vfmsub_vf.h23
1 files changed, 9 insertions, 14 deletions
diff --git a/riscv/insns/vfmsub_vf.h b/riscv/insns/vfmsub_vf.h
index 44bb5ab..a85d267 100644
--- a/riscv/insns/vfmsub_vf.h
+++ b/riscv/insns/vfmsub_vf.h
@@ -1,19 +1,14 @@
// vfmsub: vd[i] = +(vd[i] * f[rs1]) - vs2[i]
-require_fp;
-softfloat_roundingMode = STATE.VU.vxrm;
-float32_t mul_result;
-
VFP_VF_LOOP
({
- switch(STATE.VU.vsew){
- case e32:
- mul_result = f32_mul(vd, rs1);
- vd = f32_sub(mul_result, vs2);
+ switch(STATE.VU.vsew){
+ case e32:
+ vd = f32_mulAdd(vd, rs1, f32(vs2.v ^ F32_SIGN));
break;
- case e16:
- case e8:
- default:
- softfloat_exceptionFlags = 1;
- };
+ case e16:
+ case e8:
+ default:
+ softfloat_exceptionFlags = 1;
+ break;
+ };
})
-set_fp_exceptions;