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| author | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2011-04-18 22:55:28 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2011-04-18 22:55:28 -0700 |
| commit | c6b549289aa0f6d975307ebdddbbd6b8b0a31e7e (patch) | |
| tree | 28bbc4f89427a17ac2f5b94a6c295bf6bc321e95 /riscv/insns/sraiw.h | |
| parent | 0433532951969fc2330cd451a91c0094e9d942e0 (diff) | |
| download | spike-c6b549289aa0f6d975307ebdddbbd6b8b0a31e7e.zip spike-c6b549289aa0f6d975307ebdddbbd6b8b0a31e7e.tar.gz spike-c6b549289aa0f6d975307ebdddbbd6b8b0a31e7e.tar.bz2 | |
[xcc,sim] rv64 'w' instruction semantics changed
they no longer require their inputs to be canonicalized 32b values, so
this speeds up mixed int/long code sequences.
Diffstat (limited to 'riscv/insns/sraiw.h')
| -rw-r--r-- | riscv/insns/sraiw.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/sraiw.h b/riscv/insns/sraiw.h index 42d0fc3..4c56730 100644 --- a/riscv/insns/sraiw.h +++ b/riscv/insns/sraiw.h @@ -1,2 +1,2 @@ require_xpr64; -RD = sext32(sreg_t(RS1) >> SHAMTW); +RD = sext32(int32_t(RS1) >> SHAMTW); |