diff options
| author | Andrew Waterman <andrew@sifive.com> | 2024-06-13 16:28:05 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2024-06-13 16:28:05 -0700 |
| commit | 92d6c3f7f26b49180178aaa9a3644c92adfa3ef6 (patch) | |
| tree | e528fe302700c53397c51319fdc65e59c9ac1ffd /riscv/insns/sd.h | |
| parent | 62d5c06dfb3aae38d979afc066bd604cbccbfbe0 (diff) | |
| parent | 70d26d64e6ba2da329357a88dc313277fff6c22c (diff) | |
| download | spike-92d6c3f7f26b49180178aaa9a3644c92adfa3ef6.zip spike-92d6c3f7f26b49180178aaa9a3644c92adfa3ef6.tar.gz spike-92d6c3f7f26b49180178aaa9a3644c92adfa3ef6.tar.bz2 | |
Merge branch 'NXP-zilsd'
Diffstat (limited to 'riscv/insns/sd.h')
| -rw-r--r-- | riscv/insns/sd.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/riscv/insns/sd.h b/riscv/insns/sd.h index 5c9dd4e..c80f137 100644 --- a/riscv/insns/sd.h +++ b/riscv/insns/sd.h @@ -1,2 +1,7 @@ -require_rv64; -MMU.store<uint64_t>(RS1 + insn.s_imm(), RS2); +require((xlen == 64) || p->extension_enabled(EXT_ZILSD)); + +if (xlen == 32) { + MMU.store<uint64_t>(RS1 + insn.s_imm(), RS2_PAIR); +} else { + MMU.store<uint64_t>(RS1 + insn.s_imm(), RS2); +} |