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| author | Andrew Waterman <andrew@sifive.com> | 2022-10-17 13:51:59 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2022-10-17 13:51:59 -0700 |
| commit | 68aeeb5500521ff52c216862f9a653b64191f3ad (patch) | |
| tree | 407230ff48f79f177a792451598d9b2b6e3d34a0 /riscv/insn_macros.h | |
| parent | 191634d2854dfed448fc323195f9b65c305e2d77 (diff) | |
| parent | 03be4ae6c7b8e9865083b61427ff9724c7706fcf (diff) | |
| download | spike-plic_uart_v1.zip spike-plic_uart_v1.tar.gz spike-plic_uart_v1.tar.bz2 | |
Merge branch 'master' into plic_uart_v1plic_uart_v1
Diffstat (limited to 'riscv/insn_macros.h')
| -rw-r--r-- | riscv/insn_macros.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insn_macros.h b/riscv/insn_macros.h index 2fdfced..8ec8f76 100644 --- a/riscv/insn_macros.h +++ b/riscv/insn_macros.h @@ -4,6 +4,6 @@ // These conflict with Boost headers so can't be included from insn_template.h #define P (*p) -#define require(x) do { if (unlikely(!(x))) throw trap_illegal_instruction(insn.bits()); } while (0) +#define require(x) (unlikely(!(x)) ? throw trap_illegal_instruction(insn.bits()) : (void) 0) #endif |