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author | Scott Johnson <scott.johnson@arilinc.com> | 2021-09-14 16:29:48 -0700 |
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committer | Scott Johnson <scott.johnson@arilinc.com> | 2021-09-16 10:52:14 -0700 |
commit | f19f39f0c11d793e29196f0afc65f7f21c59871e (patch) | |
tree | 292c2b7cc6168915990eaad19141bdcfc89437d1 /riscv/execute.cc | |
parent | 056fc389d2e63eecf5d47bc9d6f80476959623be (diff) | |
download | spike-f19f39f0c11d793e29196f0afc65f7f21c59871e.zip spike-f19f39f0c11d793e29196f0afc65f7f21c59871e.tar.gz spike-f19f39f0c11d793e29196f0afc65f7f21c59871e.tar.bz2 |
Convert minstret to csr_t
This is a little messy in RV32 since it's accessed via two different
CSRs (upper and lower halves).
This changes logging of mcycle[h] to log a change to minstret[h],
since that's how it's always been implemented in Spike. There is no
separate mcycle register.
Diffstat (limited to 'riscv/execute.cc')
-rw-r--r-- | riscv/execute.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/execute.cc b/riscv/execute.cc index 53f956c..ed64277 100644 --- a/riscv/execute.cc +++ b/riscv/execute.cc @@ -348,7 +348,7 @@ void processor_t::step(size_t n) n = ++instret; } - state.minstret += instret; + state.minstret->bump(instret); n -= instret; } } |