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author | Scott Johnson <scott.johnson@arilinc.com> | 2021-11-02 19:25:09 -0700 |
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committer | Scott Johnson <scott.johnson@arilinc.com> | 2021-11-04 11:44:14 -0700 |
commit | e6aa0a1c73881099624dc218c2b1b154c11a578f (patch) | |
tree | 00902663dc50b9ef04d49b4c83a95c594e7822c5 /riscv/execute.cc | |
parent | f862f8c9f2d283b39d0141b798dcb9f96dca5129 (diff) | |
download | spike-e6aa0a1c73881099624dc218c2b1b154c11a578f.zip spike-e6aa0a1c73881099624dc218c2b1b154c11a578f.tar.gz spike-e6aa0a1c73881099624dc218c2b1b154c11a578f.tar.bz2 |
Report proper GVA bit on breakpoint traps
Diffstat (limited to 'riscv/execute.cc')
-rw-r--r-- | riscv/execute.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/execute.cc b/riscv/execute.cc index 467a2b4..3f7584e 100644 --- a/riscv/execute.cc +++ b/riscv/execute.cc @@ -329,7 +329,7 @@ void processor_t::step(size_t n) enter_debug_mode(DCSR_CAUSE_HWBP); break; case ACTION_DEBUG_EXCEPTION: { - trap_breakpoint trap(/*gva*/false, t.address); + trap_breakpoint trap(state.v, t.address); take_trap(trap, pc); break; } |