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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-06-06 03:13:52 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-06-18 08:54:10 -0700 |
| commit | 887dbf29497534ff5bf7906925f0f90aa060b778 (patch) | |
| tree | 30a65841a4b6f1ddcbc5b891e8c06c38aa9168ef /riscv/execute.cc | |
| parent | 48fe0c484d50073bd5d12bdb7fef5b7ea257e006 (diff) | |
| download | spike-887dbf29497534ff5bf7906925f0f90aa060b778.zip spike-887dbf29497534ff5bf7906925f0f90aa060b778.tar.gz spike-887dbf29497534ff5bf7906925f0f90aa060b778.tar.bz2 | |
rvv: extend interactive debug
add command to show vector register in debug mode
Signed-off-by: Bruce Hoult <bruce@hoult.org>
Diffstat (limited to 'riscv/execute.cc')
| -rw-r--r-- | riscv/execute.cc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/riscv/execute.cc b/riscv/execute.cc index 86e6e3e..54e293d 100644 --- a/riscv/execute.cc +++ b/riscv/execute.cc @@ -145,7 +145,6 @@ void processor_t::step(size_t n) if (debug && !state.serialized) disasm(fetch.insn); pc = execute_insn(this, pc, fetch); - advance_pc(); } } |