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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2021-02-22 20:16:48 -0800 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2021-02-24 18:40:56 -0800 |
| commit | a9eae3e6290c1c3b2bcfcce1990b5513a69b6f19 (patch) | |
| tree | d0d9d94894cf0c34ea1a116143be9b2e51c4bd4b /riscv/encoding.h | |
| parent | 45b894876112a9f6ac5639bb6ee8427211df7280 (diff) | |
| download | spike-a9eae3e6290c1c3b2bcfcce1990b5513a69b6f19.zip spike-a9eae3e6290c1c3b2bcfcce1990b5513a69b6f19.tar.gz spike-a9eae3e6290c1c3b2bcfcce1990b5513a69b6f19.tar.bz2 | |
rvv: add vsetivli
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/encoding.h')
| -rw-r--r-- | riscv/encoding.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/riscv/encoding.h b/riscv/encoding.h index ba5fa21..881ed7d 100644 --- a/riscv/encoding.h +++ b/riscv/encoding.h @@ -1,6 +1,6 @@ /* * This file is auto-generated by running 'make ../riscv-isa-sim/riscv/encoding.h' in - * https://github.com/riscv/riscv-opcodes (79c18f0) + * https://github.com/riscv/riscv-opcodes (e8f0392) */ /* See LICENSE for license details. */ @@ -1222,6 +1222,8 @@ #define MASK_CUSTOM3_RD_RS1 0x707f #define MATCH_CUSTOM3_RD_RS1_RS2 0x707b #define MASK_CUSTOM3_RD_RS1_RS2 0x707f +#define MATCH_VSETIVLI 0xc0007057 +#define MASK_VSETIVLI 0xc000707f #define MATCH_VSETVLI 0x7057 #define MASK_VSETVLI 0x8000707f #define MATCH_VSETVL 0x80007057 @@ -2891,6 +2893,7 @@ DECLARE_INSN(custom3_rs1_rs2, MATCH_CUSTOM3_RS1_RS2, MASK_CUSTOM3_RS1_RS2) DECLARE_INSN(custom3_rd, MATCH_CUSTOM3_RD, MASK_CUSTOM3_RD) DECLARE_INSN(custom3_rd_rs1, MATCH_CUSTOM3_RD_RS1, MASK_CUSTOM3_RD_RS1) DECLARE_INSN(custom3_rd_rs1_rs2, MATCH_CUSTOM3_RD_RS1_RS2, MASK_CUSTOM3_RD_RS1_RS2) +DECLARE_INSN(vsetivli, MATCH_VSETIVLI, MASK_VSETIVLI) DECLARE_INSN(vsetvli, MATCH_VSETVLI, MASK_VSETVLI) DECLARE_INSN(vsetvl, MATCH_VSETVL, MASK_VSETVL) DECLARE_INSN(vle1_v, MATCH_VLE1_V, MASK_VLE1_V) |