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| author | Scott Johnson <scott.johnson@arilinc.com> | 2021-11-02 14:58:33 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-11-02 14:58:33 -0700 |
| commit | 9139d5f3873a048b31b1d5ae70bf9b91b7966272 (patch) | |
| tree | be7ae1054808dd4ae4db6c2b1e4592578dec1c52 /riscv/encoding.h | |
| parent | 47aa83c2dda373bc266de2cb5fc85544cb7bdea8 (diff) | |
| download | spike-9139d5f3873a048b31b1d5ae70bf9b91b7966272.zip spike-9139d5f3873a048b31b1d5ae70bf9b91b7966272.tar.gz spike-9139d5f3873a048b31b1d5ae70bf9b91b7966272.tar.bz2 | |
Regenerate encoding.h from riscv-opcodes (#848)
This will enable the Krypto changes in #846 to apply cleanly.
This removes the encodings for N-extension (user interrupts) which
were never implemented in Spike; also fixes the encoding of
sfence.w.inval and sfence.inval.ir, confirmed by @daniellustig:
https://github.com/riscv-software-src/riscv-isa-sim/pull/846#discussion_r741437419
This was generated from
https://github.com/riscv/riscv-opcodes/commit/70c120b5464d0a77491f07e5d66c4523d63a86a4
which I created to get the generated encoding.h to most closely match
what Spike already had; see https://github.com/riscv/riscv-opcodes/pull/87
Diffstat (limited to 'riscv/encoding.h')
| -rw-r--r-- | riscv/encoding.h | 25 |
1 files changed, 3 insertions, 22 deletions
diff --git a/riscv/encoding.h b/riscv/encoding.h index b216296..49ee3d5 100644 --- a/riscv/encoding.h +++ b/riscv/encoding.h @@ -1,6 +1,6 @@ /* * This file is auto-generated by running 'make ../riscv-isa-sim/riscv/encoding.h' in - * https://github.com/riscv/riscv-opcodes (a4069bc) + * https://github.com/riscv/riscv-opcodes (70c120b) */ /* See LICENSE for license details. */ @@ -927,8 +927,6 @@ #define MASK_ECALL 0xffffffff #define MATCH_EBREAK 0x100073 #define MASK_EBREAK 0xffffffff -#define MATCH_URET 0x200073 -#define MASK_URET 0xffffffff #define MATCH_SRET 0x10200073 #define MASK_SRET 0xffffffff #define MATCH_MRET 0x30200073 @@ -954,9 +952,9 @@ #define MATCH_SINVAL_VMA 0x16000073 #define MASK_SINVAL_VMA 0xfe007fff #define MATCH_SFENCE_W_INVAL 0x18000073 -#define MASK_SFENCE_W_INVAL 0xfff07fff +#define MASK_SFENCE_W_INVAL 0xffffffff #define MATCH_SFENCE_INVAL_IR 0x18100073 -#define MASK_SFENCE_INVAL_IR 0xfff07fff +#define MASK_SFENCE_INVAL_IR 0xffffffff #define MATCH_HINVAL_VVMA 0x36000073 #define MASK_HINVAL_VVMA 0xfe007fff #define MATCH_HINVAL_GVMA 0x76000073 @@ -2798,18 +2796,10 @@ #define CSR_FFLAGS 0x1 #define CSR_FRM 0x2 #define CSR_FCSR 0x3 -#define CSR_USTATUS 0x0 -#define CSR_UIE 0x4 -#define CSR_UTVEC 0x5 #define CSR_VSTART 0x8 #define CSR_VXSAT 0x9 #define CSR_VXRM 0xa #define CSR_VCSR 0xf -#define CSR_USCRATCH 0x40 -#define CSR_UEPC 0x41 -#define CSR_UCAUSE 0x42 -#define CSR_UTVAL 0x43 -#define CSR_UIP 0x44 #define CSR_CYCLE 0xc00 #define CSR_TIME 0xc01 #define CSR_INSTRET 0xc02 @@ -3415,7 +3405,6 @@ DECLARE_INSN(bfpw, MATCH_BFPW, MASK_BFPW) DECLARE_INSN(xperm_w, MATCH_XPERM_W, MASK_XPERM_W) DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL) DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK) -DECLARE_INSN(uret, MATCH_URET, MASK_URET) DECLARE_INSN(sret, MATCH_SRET, MASK_SRET) DECLARE_INSN(mret, MATCH_MRET, MASK_MRET) DECLARE_INSN(dret, MATCH_DRET, MASK_DRET) @@ -4354,18 +4343,10 @@ DECLARE_INSN(vpopc_m, MATCH_VPOPC_M, MASK_VPOPC_M) DECLARE_CSR(fflags, CSR_FFLAGS) DECLARE_CSR(frm, CSR_FRM) DECLARE_CSR(fcsr, CSR_FCSR) -DECLARE_CSR(ustatus, CSR_USTATUS) -DECLARE_CSR(uie, CSR_UIE) -DECLARE_CSR(utvec, CSR_UTVEC) DECLARE_CSR(vstart, CSR_VSTART) DECLARE_CSR(vxsat, CSR_VXSAT) DECLARE_CSR(vxrm, CSR_VXRM) DECLARE_CSR(vcsr, CSR_VCSR) -DECLARE_CSR(uscratch, CSR_USCRATCH) -DECLARE_CSR(uepc, CSR_UEPC) -DECLARE_CSR(ucause, CSR_UCAUSE) -DECLARE_CSR(utval, CSR_UTVAL) -DECLARE_CSR(uip, CSR_UIP) DECLARE_CSR(cycle, CSR_CYCLE) DECLARE_CSR(time, CSR_TIME) DECLARE_CSR(instret, CSR_INSTRET) |