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authorAndrew Waterman <andrew@sifive.com>2022-10-17 13:51:59 -0700
committerAndrew Waterman <andrew@sifive.com>2022-10-17 13:51:59 -0700
commit68aeeb5500521ff52c216862f9a653b64191f3ad (patch)
tree407230ff48f79f177a792451598d9b2b6e3d34a0 /riscv/devices.cc
parent191634d2854dfed448fc323195f9b65c305e2d77 (diff)
parent03be4ae6c7b8e9865083b61427ff9724c7706fcf (diff)
downloadspike-plic_uart_v1.zip
spike-plic_uart_v1.tar.gz
spike-plic_uart_v1.tar.bz2
Merge branch 'master' into plic_uart_v1plic_uart_v1
Diffstat (limited to 'riscv/devices.cc')
-rw-r--r--riscv/devices.cc13
1 files changed, 13 insertions, 0 deletions
diff --git a/riscv/devices.cc b/riscv/devices.cc
index eb677a5..81b232d 100644
--- a/riscv/devices.cc
+++ b/riscv/devices.cc
@@ -137,3 +137,16 @@ char* mem_t::contents(reg_t addr) {
}
return search->second + pgoff;
}
+
+void mem_t::dump(std::ostream& o) {
+ const char empty[PGSIZE] = {0};
+ for (reg_t i = 0; i < sz; i += PGSIZE) {
+ reg_t ppn = i >> PGSHIFT;
+ auto search = sparse_memory_map.find(ppn);
+ if (search == sparse_memory_map.end()) {
+ o.write(empty, PGSIZE);
+ } else {
+ o.write(sparse_memory_map[ppn], PGSIZE);
+ }
+ }
+}