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author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-21 01:17:22 -0700 |
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committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-21 05:49:28 -0700 |
commit | 7b1291e2debde18c48cf30815fe4777ef3cce4f1 (patch) | |
tree | 3c54ab595e5a98d5dd3fe913beb4f4f9c8bdfd5a /riscv/decode.h | |
parent | 8371e72b26d70c14f38de4e20543a51bb396d42c (diff) | |
download | spike-7b1291e2debde18c48cf30815fe4777ef3cce4f1.zip spike-7b1291e2debde18c48cf30815fe4777ef3cce4f1.tar.gz spike-7b1291e2debde18c48cf30815fe4777ef3cce4f1.tar.bz2 |
rvv: src can't overlap dst for ext
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/decode.h')
-rw-r--r-- | riscv/decode.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 942c17c..76b9382 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -1759,6 +1759,7 @@ for (reg_t i = 0; i < P.VU.vlmax && P.VU.vl != 0; ++i) { \ require_vm; \ reg_t from = P.VU.vsew / div; \ require(from >= e8 && from <= e64); \ + require_noover(insn.rd(), P.VU.vflmul, insn.rs2(), P.VU.vflmul / div); \ reg_t pat = (((P.VU.vsew >> 3) << 4) | from >> 3); \ VI_GENERAL_LOOP_BASE \ VI_LOOP_ELEMENT_SKIP(); \ |